| Commit message (Collapse) | Author | Age | Files | Lines |
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based on include-what-you-use suggestions
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by making use of the iomuxc regmap. While there I realized that the
naming definitions for the first two bits of the register are wrong.
Thus, update the mask to include all lower bits and rename bit 1 to
denote "MPLL enable". This should be flipped last to turn it on.
ok kettenis@
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and sata ref clock in imxccm(4).
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controller. Switch all i.MX6 devices over to the new FDT-aware interrupt
establish API and enable imxgpc(4).
This may break other platforms that use ampintc(4) as their interrupt
controller. We will fix this as soon as possible by switching them over
to the new interrupt establish API as well.
This also removes the hack in fec(4) to avoid the gpio-based interrupt
workaround. This commit is an essential step on the road to fix that
issue properly.
ok patrick@, jsg@
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pass a pre-processed array of fdt_reg structs. This means
that the drivers don't have to understand the cell properties
themselves but can rely on the 64-bit addr/size pairs.
ok kettenis@
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such that we can don't end up with conflicting attachments of other
SoC-specific glue code.
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ok jsg@
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the code present in omap/omap.c imx/imx.c and sunxi/sunxi.c
All this code looks quite the same, so we move it in a generic armv7/armv7.c
This is a step closer to only one kernel for all armv7 boards.
ok patrick@, rapha@
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