| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Ensure proper order of register accesses by readback after write. |   visa | 2017-09-21 | 1 | -2/+5 |
| | | | | | This fixes spurious interrupts seen on CN7360. | ||||
| * | Attach com(4) using fdt on octeon. | visa | 2017-07-03 | 1 | -50/+74 |
| | | | | | | The relevant part of uartbus(4) is made part of the com(4) glue to avoid extra maneuvers in the code. | ||||
| * | Enable UART FIFOs. | visa | 2016-04-14 | 1 | -2/+5 |
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| * | Wrap comintr() so that the interrupt handler always returns non-zero. | visa | 2016-04-14 | 1 | -2/+17 |
| | | | | | This prevents console clutter about spurious UART interrupts. | ||||
| * | Whitespace. |   uebayasi | 2015-02-05 | 1 | -7/+7 |
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| * | Use octeon_xkphys_*_8(). | uebayasi | 2015-02-05 | 1 | -21/+16 |
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| * | The io clock on Octeon II (CN6xxx) runs at a different rate to the cpu clock. |   jmatthew | 2014-06-17 | 1 | -2/+3 |
| | | | | | | | Program the uarts based on the io clock rate on these platforms. ok jasper@ pirofti@ yasuoka@ | ||||
| * | add XXX comment for delay_changed, untill we figure out what it actually does. |   jasper | 2013-06-05 | 1 | -1/+2 |
| | | | | | ok uebayasi@ | ||||
| * | whitespace | jasper | 2013-06-05 | 1 | -4/+4 |
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| * | remove unneeded octeonreg.h include | jasper | 2013-06-02 | 1 | -2/+1 |
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| * | combus renamed uartbus, com_oct renamed cn30xxuart |   syuu | 2011-05-08 | 1 | -0/+211 |
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index : wireguard-openbsd | |
| WireGuard implementation for the OpenBSD kernel | Matt Dunwoodie |
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