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* Remove unused spllock().visa2018-08-201-2/+1
| | | | OK deraadt@ mpi@
* Include <sys/mutex.h> rather than <machine/mutex.h>mpi2018-01-221-2/+2
| | | | Required by upcoming MI mutex change.
* Define and use IPL_MPFLOOR in our common mutex implementation.mpi2018-01-131-1/+2
| | | | ok kettenis@, visa@
* Remove leftovers of a past softintr mechanism.visa2017-07-251-5/+1
| | | | OK mpi@, kettenis@
* intr_barrier(9) for macppc and socppc.kettenis2015-09-131-2/+3
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* IPL_MPSAFE bits for macppc with openpic(4).mpi2015-06-241-9/+8
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* Implement splassert(9) for powerpc.mpi2015-01-041-3/+20
| | | | | | | | | | | | | | | | | This changes the logic to prevent a recursion when processing soft interrupts. Previously a per-CPU flag was set before re-enabling interrupts. Now the IPL level is raised to SOFTTTY which makes splsoftassert() happy, greatly inspired by mips64. As a side effect, the ppc_intr_{disable,enable}() dance is now done only once instead of twice per splx(9). While here, make use of dosoftint() instead of having 3 different functions for dispatching soft interrupts. Tested by deraadt@ on G4 smp and by myself G5 smp, G3, G4 and socppc. No objection from the usual (and over busy) suspects.
* Add a dummy IPL_MPSAFE definition.kettenis2013-05-171-1/+3
| | | | ok miod@, mikeb@
* For interrupts that get established before we attach the interrupt controller,kettenis2012-08-211-1/+2
| | | | | | store the type of the interrupt (level, edge). ok miod@, mpi@
* Return of the long missing powerpc interrupt rewrite. Was working fordrahn2011-08-291-56/+73
| | | | several weeks before release on macppc, socppc bugs just fixed.
* rename imask[] to cpu_imask[] to because imask is too loud as far asderaadt2011-01-081-8/+8
| | | | | kernel namespace ok miod
* Convert netisr to a normal soft interrupt instead of hanving MD codeclaudio2010-12-211-6/+1
| | | | | | for it. This makes the netisr a real C function which will help further development. No noticable performance change on i386 and amd64. With input from kettenis@ and miod@ additional OKs mikeb@ and henning@
* Make sure IPL_SCHED is always defined by MD headers, instead of having a MImiod2010-04-231-1/+2
| | | | | | fallback definition in <sys/sched.h>, so that there is no hidden include ordering requirement between <machine/intr.h> and <sys/sched.h>. ok deraadt@ tedu@
* Generic soft interrupts for macppc. Tested by mk@, deraadt@kettenis2009-10-011-18/+50
| | | | ok miod@
* Constify the what/name parameter of pci_intr_establish().mk2009-08-221-2/+2
| | | | | | | | | Tested by myself, sthen, oga, kettenis, and jasper. Input from sthen and jasper. ok kettenis (Manpage follows shortly.)
* backout interrupt diff until it the next round of fixesderaadt2009-06-091-76/+41
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* Reintroduce the macppc interrupt subsystem rewrite. Several bugs havedrahn2009-06-021-41/+76
| | | | been found and corrected.
* Introduce splsoftassert(), similar to splassert() but for soft interruptmiod2009-03-151-1/+2
| | | | | | levels. This will allow for platforms where soft interrupt levels do not map to real hardware interrupt levels to have soft ipl values overlapping hard ipl values without breaking spl asserts.
* back out the new interrupt subsystem because some little bug still lurks in therederaadt2008-11-211-83/+35
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* miod pointed out that some items were multiply defined (patched intodrahn2008-09-191-6/+1
| | | | existance too many times).
* Redesign of the powerpc interrupt architecture, use true levels intead ofdrahn2008-09-181-35/+88
| | | | | blocking specific interrupts. Needs signficant testing to prove that one remaining elusive bug has been squashed.
* SMP ddb support, with some feedback from kettenis.drahn2008-09-161-1/+6
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* Turn the spl* macros into functions.thib2007-11-141-46/+6
| | | | | | | Shaves a few bytes of the kernel. No measurable performance loss. ok drahn@, kettenis@
* Use atomic operations in set_sint() instead of disabling interrupts in themiod2007-05-191-15/+3
| | | | function. ok kettenis@
* Move macppc to __HAVE_CPUINFO, and make locore.S and trap.c suitable forkettenis2007-03-201-10/+16
| | | | | | | | | MULTIPROCESSOR. From now on sprg0 holds a pointer to struct cpuinfo, which is used to spill registers to during trap instead of the globals we used to use for that purpose. Bits and pieces from NetBSD. Help from drahn@ and art@. Tested by xsa@, thib@, miod@, gwk@, deraadt@. ok drahn@, gwk@
* remove IPL_IMP and splimp().brad2006-03-121-4/+2
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* cbb needs IPL_VM to be defined now.miod2006-03-111-2/+3
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* nothing uses spllowersoftclock() anymoremickey2005-04-191-2/+1
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* {e,}intr{cnt,names} bye-bye.miod2004-12-241-2/+1
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* Block splsoftclock in splsoftnet, and splsoftclock and splsoftnet in splsoftttydrahn2004-10-011-3/+3
| | | | Prevents a race which can corrupt pools, found dhartmei, fix by art and me.
* Use new event counter API for interrupt counting on macppc. drahn@ okaaron2004-06-281-9/+11
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* tab/whitespace cleanup.drahn2003-10-311-4/+2
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* Use defines instead of magic constants for more IPL_ stuff, also sortdrahn2003-10-191-8/+9
| | | | | the IPL_ values by priority, not somewhat random values. No unmodified code relied on the order of these defines.
* tickspending is now a private variable of clock.cdrahn2003-07-141-2/+2
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* 'dual' clock support for macppc, this allows the stat clock to rundrahn2003-07-141-2/+3
| | | | | | at a rate independant of the HZ clock. when profiling is enabled stat clock now runs at 1000/s instead of the normal 100/s. Other improvements to the ppc clock handling and KNF/ansi.
* backout prematurederaadt2002-09-151-9/+9
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* KNFderaadt2002-09-151-9/+9
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* Cardbus/pcmcia support for macppc. parts borrowed from NetBSD, and otherdrahn2002-07-231-1/+3
| | | | portions of the tree.
* Define placeholders for art's splassert() debugging stuff on all arches.miod2002-04-291-1/+4
| | | | | | Currently as no-ops everywhere. ok art@, deraadt@
* First round of __P removal in sysmillert2002-03-141-9/+9
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* splclock() should block SPL_BIO - SPL_IMP.drahn2002-01-261-2/+2
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* ARGH, fix it right...drahn2002-01-211-2/+2
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* Better barrier protection. pefo found an instance where the previousdrahn2002-01-211-10/+10
| | | | protection was not good enough. work from theo, pefo, toby.
* Remove pointless additional 'syncing' instructions in the powerpc spl*()drahn2001-11-191-10/+10
| | | | | functions. Seems to have no effect on system run time (it should have...) reduces GENERIC kernel size by 52k.
* The "powerpc" port which has supported the newer Apple Macintosh powerpc baseddrahn2001-09-011-4/+4
| | | | | | | | | | | | | | is being renamed to macppc. This is to allow sharing of common code between different powerpc base platforms. Most of the work involved in the renaming process was performed by miod@ Files moved from powerpc/include to macppc/include Some files were not "moved" but wrapper files were created which include the powerpc/include version. Several of the powerpc/include files where changed to reflect that they are POWERPC_* not MACHINE_*.
* Add prototypes for softnet, ofrootfound.drahn2001-06-241-1/+2
| | | | Code cleanup for pmap headers.
* Define splvm() for arches who don't already provide it, with the samemiod2001-06-241-1/+2
| | | | | definition as splimp(). art@ ok
* inlined function definition clean, in preparation of more strict -W warningdrahn2001-06-241-9/+5
| | | | flags.
* Make several global variables referenced as extern, not common.drahn2001-03-291-3/+3
| | | | Cleans up symbols in object files.
* Since it is possible for the interrupt controller to be configured laterahnds2000-07-071-1/+4
| | | | | | | | | | | | in the config cycle, and pci devices as well as mac onboard devices do not use interrupts to probe. It is possible to record that the interrupt is to be configured, but not configure it with the interrupt controller until the interrupt controller configures itself. This is lazy binding of interrupts. If there is a conflicting interrupt or other problem it will be noticed when the interrupt controller configures and collects the data rather than when the device configures. Currently on the openpic interrupt controller supports these pre-configured interrupts.
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