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2021-01-23OPAL implements firmware calls that abstract communicating with the BMC overkettenis2-1/+179
IPMI. Use these calls to add support for impi(4) on PowerNV systems. ok dlg@
2020-12-30Enter power-saving mode on POWER9 (ISA v3)gkoehler1-7/+94
When opal(4) attaches, look in the device tree for a psscr value. In cpu_idle_cycle(), use this psscr value and the stop instruction to wait for the next interrupt. In mp kernels, cpu_unidle() now sends an interrupt. In "sysctl hw.sensors", the power and temperature sensors from opalsens(4) may show lower values. The cpu may exit stop at the system reset vector after losing user registers. If so, restore some registers. For now, ignore deeper stop states that would lose hypervisor registers. Our mp kernel uses only the first hardware thread of each core. Take the extra threads from the firmware and stop them forever; this may switch the core from SMT4 to single-thread mode and increase performance. partly by kettenis@, ok kettenis@
2020-12-20Fix typo.kettenis1-2/+2
2020-12-20The TCE table needs to be aligned on a boundary that is a multiple of itskettenis1-2/+2
size. Fixes booting on machines that have memory banks higher up in physical address space which needs a larger TCE table.
2020-11-15Make sure we perform address translation to all elements of a DMA mapping.kettenis1-2/+2
2020-10-30No need to print that we're the console device; wsdisplay(4) will do thatkettenis1-4/+1
for us.
2020-10-30Add a comment that explains why the major/minor of the device is setkettenis1-8/+12
unconditionally now that astfb(4) can be used as the console as well. Only print that we're the console if we actually are.
2020-10-30Allow astfb(4) to become the console. At this point this is a "late" switchkettenis1-2/+17
and early kernel boot messages will appear on opalcons(4) until astfb(4) attaches.
2020-10-25Implement a workaround for PCI devices that can't address the full 64-bitkettenis1-7/+173
PCI address space. Needed for radeondrm(4) and amdgpu(4) since Radeon GPUs only implement 36, 40 or 44 bits of address space.
2020-10-24Prefer 32-bit MSI even if the hardware supports 64-bit MSI to workkettenis1-5/+10
around buggy Radeon cards that advertise 64-bit MSI but only implement 40 bits.
2020-10-10Handle spurious interrupts.kettenis1-2/+12
ok patrick@, deraadt@
2020-10-01Add astfb(4), a driver for the framebuffer of the Aspeed BMC found onkettenis1-0/+236
many POWER8 and POWER9 systems.
2020-10-01correct size argument to free(9)jsg1-2/+2
ok kettenis@
2020-09-26Do the NULL -> cpu_info_primary conversion in the interrupt controllerkettenis2-2/+8
drivers instead of the "midlayer". I had missed a couple of places in the midlayer and instead of fixing this in several places it is better to do it in the functions that get invoked in the end.
2020-09-23Use an IPI, so hw.setperf affects all cores in the mp kernel.gkoehler1-1/+7
Before, apm -A was speeding up only one core of my POWER9. Now, apm -A speeds up all cores, so my parallel builds are faster. I copy the idea from amd64 and i386: mp_setperf() sends an IPI to all cpus; the interrupt handler calls ul_setperf(). ok deraadt@ kettenis@
2020-09-21Correctly pass the "struct cpu_info" pointer along when establishingkettenis5-16/+15
interrupts. This fixes IPIs on machines with certain (newer?) OPAL firmware. It also allows implementing pci_intr_establish_cpu(9), which is needed for distributing interrupt handlers across CPUs. tested by gkoehler@
2020-09-03Sprinkle some more eieio(); seems to avoid triggering the KASSERT(new > old).kettenis1-3/+5
2020-09-02vfs_shutdown() is neccessary to ensure buffer cache drain before reexec()deraadt1-1/+4
ok kettenis visa
2020-09-01Implement address translation for bus_space_mmap(9).kettenis1-1/+25
2020-09-01Store the device tree node in the pcitag_t.kettenis1-3/+34
2020-08-30Reorganize the interrupt handler code to avoid a potential bogus KASSERT,kettenis1-10/+12
handle the priority levels better and guarantee ordering of restoring the priority level after running an interrupt handler and checking for a new interrupt.
2020-08-29Mark certain sections with debug information as "allocated" such that theykettenis1-2/+14
get picked up by ddb. This makes the "pp" and "show struct" commands that depends on CTF work. ok gkoehler@
2020-08-26Declare hw_{prod,serial,uuid,vendor,ver} in <sys/systm.h>.visa1-4/+1
OK deraadt@, mpi@
2020-08-23Add xicp(4), a driver for the interrupt control presenter hardware foundkettenis1-0/+283
on POWER8 CPUs.
2020-08-23Add missing conversion from IPL to CPU priority.kettenis1-2/+2
2020-08-23Attempt to support IODA2 bridges such as the one found on POWER8 chips.kettenis1-3/+4
These lack an "ibm,opal-available-m64-ranges" property, but it seems we can assume a 0-15 range. At least this is what Linux does.
2020-07-22Don't grab the kernel lock for mpsafe interrupts.kettenis1-3/+14
2020-07-22Implement IPIs.kettenis2-26/+55
2020-07-21Attach secondary CPUs early like we now do on arm64.kettenis1-4/+4
2020-07-21Add missing KERNEL_LOCK() and KERNEL_UNLOCK() calls.kettenis1-1/+3
2020-07-18Load kernel as an initrd such that we have symbols in ddb.kettenis1-4/+29
2020-07-18Pass boothowto and bootduid parameters to the booted kernel via thekettenis1-2/+23
device tree. Make sure the RB_GOODRANDOM flag only gets set if we read a non-stale /etc/random.seed and we actually filled an .openbsd.randomdata segment.
2020-07-16Add a pseudo-driver to "kexec" an OpenBSD/powerpc64 kernel. Heavilykettenis2-0/+230
based on the octboot driver that we use for octeon. To be used in the bootloader kernel.
2020-07-16Reset firmware state upon reboot.kettenis1-2/+16
2020-07-15Use SENSOR_ENERGY as the type of energy sensors.kettenis1-2/+2
2020-07-14Make INTx interupts work.kettenis1-2/+20
2020-07-14Add xics(4), a driver for the OPAL virtual ICS.kettenis1-0/+81
2020-07-10Add hw.cpuspeed and hw.setperfgkoehler1-1/+94
Get the list of Pstates from OPAL, and use special registers to request a Pstate or check the current Pstate. The turbo Pstates are higher than the cpu's nominal speed, but the OCC's firmware should throttle down the cpu if it would overheat. ok kettenis@
2020-07-07Add opalsens(4), a driver for sensors provided by the OPAL firmware.kettenis2-1/+148
2020-07-05We need to set the bypass bit for "raw" DMA memory as well.kettenis1-1/+23
2020-07-02Use IPL_TTY, at least for now, as the only consumer of OPAL interruptskettenis1-2/+2
is opalcons(4).
2020-06-29Use the right bus space tag when enabling MSI-X interrupts. Makes themkettenis1-2/+2
actually work.
2020-06-29Attach event counter.kettenis1-1/+4
2020-06-26Accept input.kettenis1-1/+59
2020-06-26Handle OPAL interrupts.kettenis1-2/+116
2020-06-26Add support for level-triggered interrupts and unmask established interropts.kettenis1-6/+25
2020-06-26avoid uninitialised pointer usejsg1-2/+2
found with scan-build, ok kettenis@
2020-06-22Add opalcons(4), a driver for the OPAL console.kettenis2-1/+296
2020-06-19Fix calculation of the year.kettenis1-2/+2
2020-06-14Remove debug code.kettenis1-6/+1