| Commit message (Collapse) | Author | Age | Files | Lines |
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handler registration. The code is inherited from isa(4), but on the O2,
although some interrupt sources on CRIME are edge-triggered, all
the MACE interrupts are level-triggered.
From miod@
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addresses. While there, pave the way for BUS_DMA_64BIT (not working
yet).
Diff from miod@; OK dlg@
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actually use this in em(4) and xhci(4), but I'm not committing those yet
because we almost certainly need to save and restore the MSI-X registers
during suspend/resume. However, this allows mpi@ to play with multiple-vector
support in networking hardware.
Requested by mpi@
ok mlarkin@, mikeb@
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Otherwise the PHY goes undetected on the slave node of a dual-node
Origin 200. The PHY gets enabled by diagnostic checks but only on the
master node. As the attach code will now do the enabling, the checks can
be disabled on reboot, making reboots faster especially on IP27.
Tested on Origin 200 (IP27), Fuel (IP35 with iec), and Origin 350
(IP35 without iec).
Diff from miod@, ok krw@
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initial diff from jasper@
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actually handle their own interrupts. How could this get unnoticed so far?
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ok kettenis@
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such statements with it.
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bus_space_tag on sgi, but rather always provide at least a dummy asm("sync")
flavour. Saves a function pointer test at runtime.
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accessors or the byte-swapped accessors, depending upon the byteswap setting
of the device we are trying to attach.
This allows for the removal of byteswap knowledge from ioc(4) and iof(4)
drivers.
While there, build pci_chipset_t md structs by bcopy'ing a template and
filling the few runtime fields, instead of assigning every field of them.
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This mandatory function will get invoked in pci_probe_device(), and allows
a pci host driver to alter the pci_attach_args passed to a device when
attaching.
This function will also, if returning non-zero, cause the device to be
skipped completely during all the phases of the PCI device discovery
(i.e. ressource enumeration, ressource assignment, and actual attachment).
This particular feature is experimental and might be reverted in the future
(or the scope narrowed to device attachment only).
A dummy #define pci_probe_device_hook() 0 is added to all platforms except
sgi, where real functions (currently only returning 0) are added; real meat
will be added shortly.
Discussed at s2k11, no objection from the usual suspects.
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given pcitag_t configuration address space. Currently, all pci controllers
will return the usual 0x100 bytes of PCI configuration space, but this will
eventually change on PCIe-capable controlers.
ok kettenis@
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ok krw@ kettenis@
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hierarchy. Everything attached to a single root node anyway, so at
best we had a bush.
"i think it is good" deraadt@
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the pci write buffers.
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ok kettenis, deraadt
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a (missing) second serial port to ioc(4), read spdmem(4) records from the
right index, and query the Ethernet address from the I-Brick eeprom instead
of the C-Brick eeprom.
Tested by Sebastian Reitenbach, thanks!
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and compare against them when attaching potential console drivers, to figure
out whether they indeed are acting are console devices or not.
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Use this to correctly handle the onboard IOC3 chip configuration on O2k
(two IOC3 chips to be able to provide four serial ports, and the other
subdevices are split accross the two IOC3 chips).
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this gives us working glass console on Fuel, as well as on Octane systems
with Odyssey graphics.
Joint work with jsing@
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number the PCI bus they are on is connected to. Will be used shortly to help
the console device selection logic.
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subdevices; use this on iockbc to only perform the fuel workaround on the
onboard ioc.
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do this for us; PS/2 ports on CADduo boards attach keyboard and mouse now.
ok jsing@
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superio chip interrupt on two different pins (yet do not advertize
themselves as a multi-function device, of course).
So, on one hand, this makes the ioc attachment code simpler, because it
simply needs to map interrupt pins A and B, and another hand, this moves
all the interrupt knowledge to the PCI bridge driver, since routing of pin
B differs whether the device is the onboard IOC3 chip (and able to use
any of the 8 bridge interrupt sources...) or on a PCI board (with pin
mapping sane, since controlled by the bridge).
This makes superio interrupts on CADduo boards work. Tested to cause
no regressions on Origin 200, Octane and Fuel.
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ioc(4) devices. Joint work with miod@.
Committed from the glass console on an SGI Fuel.
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for IP35 systems with IOC3 onboard Ethernet to get their Ethernet address
since it's no longer stored as an owmac(4) device on the IOC3 device itself.
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attach, print it, and decide how many RX descriptors to use accordingly.
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lack of such hardware.
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as the onboard ioc device, if one has already been found on this node.
Also, on Origin 300, do not attempt to attach the PS/2 controller on the
onboard ioc(4) since PS/2 ports are not wired.
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system type list (which really is the system family) and a subsystem type.
No functional change yet.
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00:00:00:00:00:00, in order to trigger the code which will assign a `feel bad'
random address.
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far, and needs help to figure out its Ethernet address on IP35 systems.
Heavily derived from mec(4) written by Izumi Tsutsui and Christopher Sekiya,
although it required many changes to fit the IOC3 chip.
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figure out how the interrupt was routed from xbridge to xheart... (it bypasses
the regular `have xbridge send a xio interrupt packet' mechanism)
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specified in the kernel configuration file, but is provided by macebus(4)
as part of the child device attachment args, and provide both crime and
mace interrupt bitmasks; this allows us to only really enable interrupt
sources we care about, and to avoid invoking interrupt handler we don't need
to for the few mace interrupts multiplexed at the crime level.
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Still unimplemented for now.
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running on, and report this both as the hw.product sysctl and in dmesg.
Fuel and Origin 350 are no longer reported as being Origin 300 systems!
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pick the right clock if the PCI bus the I/O board is on degrades to 33MHz.
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Tested by myself, sthen, oga, kettenis, and jasper.
Input from sthen and jasper.
ok kettenis
(Manpage follows shortly.)
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Origin 350 and Tezro systems. While this chip provides serial ports, an ATAPI
interface and a PS/2 keyboard and mouse interface, this code currently only
attempts to support the serial ports.
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commented symbolic constants.
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