| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add support for the UART found on the Apple M1 SoC. |   kettenis | 2021-02-16 | 2 | -10/+30 |
| | | | | | ok patrick@ | ||||
| * | Introduce variables to deal with bit layout differences in the UFSTAT | kettenis | 2021-02-14 | 1 | -9/+26 |
| | | | | | | | | | | register. Use 32-bit reads and writes to access the URXH and UTXH registers. They're documented as 32-bit registers in the Exynos 4 and Exynos 5 User Manuals and accessing URXH with an 8-bit read triggers a fault on Apple's M1 SoC. ok patrick@ | ||||
| * | Don't hardcode com(4)'s major number in exuart(4). |   patrick | 2021-02-11 | 1 | -5/+12 |
| | | | | | ok kettenis@ | ||||
| * | arm_intr_establish_fdt() has long been renamed to fdt_intr_establish(). | patrick | 2021-02-05 | 3 | -8/+7 |
| | | |||||
| * | Fix CVS tag. | patrick | 2021-02-05 | 1 | -1/+1 |
| | | |||||
| * | Fix whitespace. | patrick | 2021-02-05 | 1 | -2/+2 |
| | | |||||
| * | Rename probe/attach functions to fit our regular naming scheme. Replace | patrick | 2021-02-05 | 1 | -13/+13 |
| | | | | | | | | | | &armv7_bs_tag with fdt_cons_bs_tag, which is our early console bus tag for both arm64 and armv7. On armv7, it points to &armv7_bs_tag. With this we can get rid of the armv7var.h include. Reduce a bit of diff to imxuart(4). ok kettenis@ | ||||
| * | Move exuart(4) to sys/dev/fdt so it can be shared between arm64 and armv7. | patrick | 2021-02-05 | 3 | -1/+1057 |
| | | | | | ok kettenis@ | ||||
| * | Tedu unnecessary imxuartvar.h. | patrick | 2021-02-04 | 2 | -21/+1 |
| | | | | | ok kettenis@ | ||||
| * | handle #pinctrl-cells 2 |   jsg | 2021-02-01 | 1 | -2/+7 |
| | | | | | | needed for >= linux 5.9 dtbs on bbb ok kettenis@ | ||||
| * | Reprogram outbound windows to match the device tree. Necessary because | kettenis | 2021-01-20 | 1 | -3/+34 |
| | | | | | | | | the EDK2-based UEFI firmware sets it to its own hardcoded values. Makes device-tree mode work with newer versions of the Raspberry Pi firmware. ok patrick@ | ||||
| * | Implement intx support. | kettenis | 2021-01-19 | 1 | -19/+123 |
| | | | | | ok patrick@ | ||||
| * | Handle pinctrl. | kettenis | 2020-12-29 | 1 | -1/+4 |
| | | |||||
| * | Add more PWM pin descriptions. | kettenis | 2020-12-29 | 1 | -1/+32 |
| | | |||||
| * | Add support for the PCIe controller found on Amlogic G12A/G12B/SM1 SoCs. | kettenis | 2020-12-28 | 1 | -11/+119 |
| | | | | | ok patrick@ | ||||
| * | Remove debug printf. | kettenis | 2020-12-27 | 1 | -2/+1 |
| | | |||||
| * | Add PCIe support. | kettenis | 2020-12-27 | 1 | -48/+68 |
| | | |||||
| * | Add PCIe power domain. | kettenis | 2020-12-27 | 1 | -1/+14 |
| | | |||||
| * | Add PCIe clocks. | kettenis | 2020-12-22 | 1 | -1/+5 |
| | | |||||
| * | Defer hardware initialization in order to give things like PCIe PHYs | kettenis | 2020-12-22 | 1 | -15/+31 |
| | | | | | | | a chance to attach. Needed for future support of PCIe on Amlogic SoCs. ok patrick@ | ||||
| * | There's no need to include the OFW GPIO header. | patrick | 2020-12-19 | 1 | -2/+1 |
| | | |||||
| * | Add support for the i.MX8MP PCIe clocks. | patrick | 2020-12-19 | 2 | -1/+40 |
| | | |||||
| * | Add support for the i.MX8MP second ethernet. The Plus SoC not only has the | patrick | 2020-12-18 | 2 | -4/+98 |
| | | | | | | usual fec(4), but also a variant of dwge(4). Unfortunately it seems to be a newer version, which isn't compatible to the one currently in our tree. | ||||
| * | Emulate open drain GPIOs. This replaces the hack added in the last commit. | kettenis | 2020-12-18 | 1 | -31/+22 |
| | | | | | ok patrick@ | ||||
| * | Make large read and write transactions work. | kettenis | 2020-12-18 | 1 | -39/+59 |
| | | |||||
| * | Add glue for the USB3 controller on the i.MX8MP SoC. NXP had this glue for | patrick | 2020-12-18 | 2 | -1/+80 |
| | | | | | | | | | | | | the i.MX8MQ as well, but while upstreaming they were told to shove it. Now for the i.MX8MP this glue is making a comeback. Apparently there's some divergence in low power handling to the regular DWC3 IP with special IRQs. Now the question remains if this driver will be obsolete soon again, or if this time it's here to stay. The fun part is that while this driver was written independent from the previous version, the diff is basically zero. ok kettenis@ | ||||
| * | Add code to initialize the USB 3 PHY on i.MX8MP. | patrick | 2020-12-18 | 1 | -2/+65 |
| | | | | | ok kettenis@ | ||||
| * | Add support for the i.MX8MP USB clocks. | patrick | 2020-12-18 | 2 | -2/+88 |
| | | |||||
| * | Attach imxgpc(4) to i.MX8MP as well. | patrick | 2020-12-18 | 1 | -1/+3 |
| | | |||||
| * | Only enable the USB 3.0 port and PHY if it is enabled on a board. | kettenis | 2020-12-17 | 1 | -5/+7 |
| | | |||||
| * | Reset pin 3 of the GPIOAO bank to input mode to work around a hardware | kettenis | 2020-12-17 | 1 | -2/+31 |
| | | | | | bug in the Odroid C4/HC4 boards. | ||||
| * | Match on "amlogic,meson-g12a-dwmac" which is used by newer Linux mainline | kettenis | 2020-12-17 | 1 | -1/+2 |
| | | | | | device trees. | ||||
| * | Add support for the "Always On" GPIOs. | kettenis | 2020-12-17 | 1 | -73/+188 |
| | | |||||
| * | Rename the macro MCLGETI to MCLGETL and removes the dead parameter ifp. |   jan | 2020-12-12 | 5 | -10/+10 |
| | | | | | | | OK dlg@, bluhm@ No Opinion mpi@ Not against it claudio@ | ||||
| * | Use 1000baseKX, 2500baseKX and 10GbaseKR media types for fixed link | kettenis | 2020-12-07 | 1 | -2/+20 |
| | | | | | | | connections to an onboard switch. ok patrick@ | ||||
| * | Use 1000baseKX and 2500baseKX media types for fixed link connections an | kettenis | 2020-12-06 | 1 | -1/+13 |
| | | | | | | | | | onboard switch. While this technically isn't 100% accurate it gives users an easy way to see what the speed of the connection is when looking at ifconfig(8) output. ok patrick@, benno@, sthen@, phessler@ | ||||
| * | Enable auto-negotiation on the SerDes links, which allows in-band-status | patrick | 2020-12-02 | 1 | -1/+2 |
| | | | | | | | | to work between mvpp(4) and mvsw(4) on the ClearFog GT 8K and hence gives us a nice link up. ok kettenis@ | ||||
| * | Add mvsw(4), a driver for Marvell "SOHO" switches that are found on some | kettenis | 2020-11-29 | 2 | -1/+364 |
| | | | | | | | | | | | | | SBCs (Turris MOX, SolidRun Clearfog GT 8K). For now this driver only supports the 88E6141 and 88E6341 switches. More switch types can be added later. The driver does some minimal hardware configuration to make it function like a dumb switch. Essentially it enables all ports mentioned in the device tree and enables the switchport PHYs and SERDES connections. ok deraadt@, patrick@ | ||||
| * | Add support for 1000base-x and 2500base-x connections. | kettenis | 2020-11-29 | 2 | -8/+98 |
| | | | | | ok patrick@ | ||||
| * | make it possible to attach other devices (for example switches) to mvmdio(4). | kettenis | 2020-11-28 | 2 | -10/+23 |
| | | | | | ok patrick@ | ||||
| * | Use bus_space_mmap(9) instead of pmap_extract(9) to find out the physical | kettenis | 2020-11-19 | 1 | -8/+5 |
| | | | | | | | (CPU) address of the device. Pointed out by miod@ ok patrick@ | ||||
| * | Split imxiic(4) into the FDT-attachment code and the i.MX I2C code | patrick | 2020-11-17 | 4 | -540/+150 |
| | | | | | | | in preparation for upcoming ACPI-attachment. ok kettenis@ | ||||
| * | Add support for the VF610 I2C controller to imxiic(4). It uses its | patrick | 2020-11-14 | 2 | -5/+53 |
| | | | | | | | | | own clock divisor table and its registers are each a byte apart. The status register is write 1 to clear instead of write 0 to clear, and the enable bit is also inverted. ok kettenis@ | ||||
| * | Move enabling/disabling the I2C controller and clearing the Interrupt | patrick | 2020-11-14 | 1 | -13/+31 |
| | | | | | | | | Flag into their own functions, since these are the two single pieces of register content that behave differently on the VF610. ok kettenis@ | ||||
| * | Add 10G media support. This makes the 10G ports on the "single shot" model | kettenis | 2020-11-14 | 1 | -2/+11 |
| | | | | | | | | work. The "double shot" model needs more work (support for "clause 45" PHYs). ok patrick@ | ||||
| * | Assert reset before configuring the MACs. Otherwise we leave the 10G MAC | kettenis | 2020-11-13 | 1 | -7/+4 |
| | | | | | | | in reset which prevents it from working. ok patrick@ | ||||
| * | To prepare for upcoming VF610 support, access the clk div table using | patrick | 2020-11-13 | 2 | -11/+16 |
| | | | | | | | | | | a pointer in the softc instead of using a hardcoded table. While there move the call to retrieve the clock frequency into the attach code, and store the value in the softc as well. This will allow a future ACPI attachment driver to supply its value in different fashion. ok kettenis@ | ||||
| * | Convert array of two-element arrays into a much more readable array of | patrick | 2020-11-13 | 2 | -7/+12 |
| | | | | | | | structs. ok kettenis@ | ||||
| * | Add define for the status register's Arbitration Lost bit. | patrick | 2020-11-13 | 1 | -1/+2 |
| | | |||||
| * | On VF610 the registers are a single byte apart, so introduce a regshift | patrick | 2020-11-13 | 1 | -8/+29 |
| | | | | | | | variable so that read/write can calculate the correct register offset. ok kettenis@ | ||||
 |
index : wireguard-openbsd | |
| WireGuard implementation for the OpenBSD kernel | Matt Dunwoodie |
| summaryrefslogtreecommitdiffstats |