| Commit message (Collapse) | Author | Age | Files | Lines |
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dormant in the driver for years, we just needed to insert the IV before
transmission and do packet number checks on received frames.
tested by kevlo@ solene@ benno@ and me on a variety of hardware
ok kevlo@ stsp@
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to reset/enable MCU
- there's no need to enable 1.2V power for rtl8192eu
ok jmatthew@
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While here sort vendors.
Tested by jmatthew@
ok stsp@, jmatthew@
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These show up with a variety of vendor/product ids, but the driver will
only match those we've tested so far.
help and testing from kevlo@
ok stsp@ kevlo@
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ok kevlo@ stsp@
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number and the fragment number, so shift it to get just the sequence number
for the tx descriptor. While here, add a #define for the flag in the same
field that enables hardware sequence numbering, and use existing constants
for some R92C_RSV_CTRL writes.
prompted by feedback from kevlo@ on another diff, tested on 8188CE, EE, EU
ok stsp@ kevlo@
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makes it more readable.
ok stsp@ and jmatthew@
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This needs a new firmware image, which should be added to the rtwn
firmware package shortly.
testing and lots of help from kevlo@
ok kevlo@ stsp@
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for rtl8188eu
- Fix typo in structure r92c_rom in comment: s/0x8192/0x8129/
- Add id member to struct r88e_rom which identifies eeprom
- Replace magic numbers with something more readable
- Cosmetic tweaking
ok stsp@
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- Use R92C_MSR rather than R92C_CR to set media status
- Replace magic numbers with something more readable
ok stsp@
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line snuck into the rtl8192ce_bb_vals_2t array. Remove it again.
This broke baseband initialization for RTL8192CE which went unnoticed
because at the time nobody had tested rtwn(4) with that chip and the
driver didn't attach to it.
Problem reported by Martin Wanvik who eventually did this test.
ok kevlo@
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Tested with TL-WN725N v2 (rtl8188eu) on amd64.
ok stsp@
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- rename bit definition of R88E_TX_RPT1_ENA to reflect reality
- no need to set R92C_FPGA0_ANAPARAM2 for 40mhz for rtl8188eu
- in rtwn_write_txpower(), writing to MCS8-15 power registers if the WNIC
has 2 spatial streams
ok stsp@
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for firmware to get ready. It fixes "urtwn0: could not load firmware page"
while running stsp@'s script: dhclient urtwn0; ifconfig urtwn0 down;
ifconfig urtwn0 scan in a loop.
- Minor cleanup for rtwn_read_rom()/rtwn_get_txpower(); no need to use
callbacks.
Tested by stsp@ and me.
ok stsp@
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- Only set value in R92C_FAST_EDCA_CTRL register if the device is
combo WiFi/Bluetooth; confirmed by Yan-Hsuan Chuan from Realtek
- There's no need to set the default value for the R92C_PIFS since
default value is 0x1c; confirmed by Yan-Hsuan Chuan from Realtek
- Disable usb Rx aggregation mode for rtl8188cu/rtl8192cu;
vendor drivers use DMA Rx aggregation mode for rtl8188cu/rtl8192cu/rtl8188eu
and use USB Rx aggregation mode for later chipsets.
Tested by stsp and me.
ok stsp@
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rtl8188eu chipset.
- Small code refactoring:
- replace hardcoded rate indexes with their name, like athn(4).
- replace fields offsets with the structure; from FreeBSD r294198.
- be compliant with definitions of the efuse in vendor hal_pg.h and
rename struct r92c_rom member names: s/channel_plan/reserved5/,
s/xtal_calib/channel_plan.
- no need to disable HWPDN twice in urtwn_r88e_power_on().
Tested by stsp@ and myself with RTL8188CUS, RTL8192CU, RTL8188EU, and
RTL8188CE devices.
ok stsp@
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Restore behaviour from before the fix of the botched R92C_USTIME_TSF register
definition. IQ cal code was referring to this register by name, but actually
needs to use the old value. So add a register definition for the old value
under a new name (R92C_BCN_CTRL1) and use this name in the IQ cal code.
Discussed with Kevin Lo
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According to Kevin Lo it was wrong (and is also wrong in the Linux driver).
FreeBSD made the same change in r282623.
Patch by Kevin Lo.
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Same changes as FreeBSD r311948 and r287584.
Patch submitted by Kevin Lo. Tested by me.
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Works much better than firmware-based rate scaling in my testing.
ok mpi@
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Get EDCA params from net80211 instead of hardcoding them.
Enable hardware management of EDCA AC queues.
Handling of frame collisions with EDCA involves random backoffs.
I found a register that looks like a seed for the pseudo-RNG involved in
computing backoffs. Feed it with arc4random() during initialization.
Add a comment to hint at the meaning of numbers written to SIFS registers,
and rename some SIFS registers to better names found in Linux.
ok mpi@
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For now this only affects RTL8188EU chips, perhaps because the author of this
patch does not own any devices containing any of the other chips (hint hint).
Patch by misha aka Mikhail / mp39590 at gmail
ok mpi@
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respective .c files.
ok mpi@
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Based on a larger diff by Mikhail, with small differences in naming things.
ok mpi@
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Based on a larger diff by Mikhail.
ok mpi@
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jmatthew
kevlo
stsp