| Commit message (Collapse) | Author | Age | Files | Lines |
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diff it against the Linux kernel sources. Fix a few bugs revealed by doing
such a diff. Tested by myself and a few others on 915, 945, 965 and
6-series.
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Far from perfect. Extra (almost essential) features like the extra
ringbuffers are not yet supported (I have half a diff), but this and the
appropriate ddx patches allow modesetting and basic shadow acceleration.
Initial work by jcs@, a few cleanups and bugfixes by me.
Tested by many on all appropriate chipsets. ok kettenis@
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'go for it' oga@
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ok oga
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cpus) to inteldrm.
This mostly works, but the suspend/resume handler doesn't put the
registers back 100% (this is being worked on) and with the X driver code
that is in snapshots (and soon to be on tech) we don't do vt switch in a
100% sane way. Similarly there are some vblank issues that aren't solved
yet, but for most usage this works with the correct Xorg DDX.
tested on two x201's, a t510 and a t410 all work given the correct
userland. Suspend works once (due to crazy crap done in the ddx) but
doesn't come back the second time and text vts are screwed post suspend.
this will be fixed shortly when a non-sucky solution has been found. for now,
this allows non-vesa X on ironlake graphics and makes us the only accelerated
but non-kms OS that works on ironlake.
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line with everything in the tree. No functional change.
I have wanted to do this for ages! More cleanup will be forthcoming.
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We no longer support these paths, only memory managed mode is now allowed.
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This enabled GEM for the intel driver unconditionally. The legacy
codepaths will be removed in approximately one week since they are now
completely unused.
After discussion with matthieu@, drahn@, kettenis@ and marco@ (well,
mostly nagging from marco ;).
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Manager api.
This is currently disabled by default under ifdef INTELDRM_GEM (option
INTELDRM_GEM in a kernel config or a patch to i915_drv.h needed to
enable), mostly because the intel X driver currently in tree does not
always play well with GEM and needs to be switched to UXA accelmethod
(which is the only option on later drivers).
While based on the intel drm code in the linux kernel this has come cleanups and
some obvious behaviour changes:
1) mmap through the GTT is entirely coherent with the gpu cache, removing
mappings whenever the cache dirties so you can not race with userland to write
to memory at the same time as the gpu.
2) pread/pwrite access is tiling-correct, so userland does not need to tile
manually (mesa has already been fixed for this a while ago). The straw that
broke the camels back here was the bit17 swizzling stuff on some mobile gpus
meansing that while userland did the swizzle itself, the kernel had to do
*extra* swizzling, this was frankly retarded so the option was dropped.
3) there is no option to map via the cpu from userland, again due to
coherency issues.
4) additional integer overflow checking in some areas.
5) we only support the newer EXECBUFFER2 command submission ioctl. the
old one is not supported at all (libdrm was fixed WRT over a week ago).
now the TODOs:
1) the locking is funky and is only correct due to biglock. it does
however work due to that. This will be fixed in tree, the design in
formulating in my head as I type.
2) there are currently no memory limits on drm memory, this needs to be
changed.
3) we really need PAT support for the machines where MTRRs are useless, else drm
uses quite a lot of cpu (this is a bug that continues from the older code
though, nothing new).
4) gpu resetting support on other than 965 is not written yet.
5) currently a lot of the code is in inteldrm, when memory management
comes to other chipset common code will be factored out into the drm
midlayer.
Tested on: 855 (x40), GM965 and 915 by me. 945 by armani@ and jkmeuser@,
gm45 by armani@ and marco@. More testing is needed before I enable this
by default though. Others also provided testing by what they tested
escapes me right now.
In order to test this enable INTELDRM_GEM in a kernel and add the following line
to the driver section in xorg.conf (I am working on a patch to autodetect the X
stuff):
Option "AccelMethod" "UXA"
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so tell the vblank layer this.
from upstream, ages ago.
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we just grab it once and drop it when we're done.
will reduce spl/splx wrangling. While here, clean it up a little bit.
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registers (man these things have a lot of state!).
ok pirofti@ (who did the activate function and tested).
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Instead of planes, use pipes for the vblank code (this matters with the
newer drivers we're now using). originally from upstream (kinda, i
adapted it a little). Much cleaner now, too.
Helps with some vblank issues sthen@ has been seeing. Also seems to fix
any issues i've seen with the x40, with suspend-on-lid disabled shutting
hte lid no longer borks X on my x40, this issue pointed out (and
reminded regularly until I found time :) by deraadt@
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Been meaning to pull this in from upstream for ages.
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the drm softc, we only have one pointer, with the rest in that struct. This is
so that vblank-less drivers (yes, they exist) don't need to waste space on
useless crud.
While i'm reworking most of this code anyway, accept that on openbsd all
of the #defined atomic functions are not atomic other than set and clear
bit. Also, realise that the vb_lock is held whenever we manipulate these
counts anyway. With those two facts in mind just remove the
atomic_blah() and just use ++ and --.
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handler anyway. replace it with ${OpenBSD_driver_name}_intr like most of
the rest of the tree. No functional change.
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defines. 0 and 1 are fine for returning from irq handlers so why bother
with the indirection?
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the unmacroed/typedefed version.
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the dev->driver irq_handler member since we now don't need to know.
Shaves a few bytes, and makes me happy.
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We already have a lock protecting the irq registers, so extend it
trivially so it protects user interrupts too. Switch irq handler to
purely local handler. Finally remove an extra test in i915_wait_irq()
since we won't sleep even without that if the test will pass.
irq_lock and handler_wrap may now die. Coming soon.
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expanding the function in line here.
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and the lock to manipulate.
first step of removing drm_irq_handler_wrap which just grabs the
irq_lock, and eventually irq_lock. drivers should manage their own.
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equivalent.
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instead of assuming BUS_SPACE_LINEAR + bus_space_vaddr while i'm at
it.
Cleans things up nicely, and shaves a little bit of space, too.
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Based on a patch from the intel driver maintainers (Jesse Barnes,
specifically)
Tested by several people on various hardware.
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dev->pa by doing the pci_intr_establish/disestablish dance in the driver
function, not in drm. This removes the need for
interrupt_{pre,post}install callbacks, instead just provide a
interrupt_install() callback.
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just put a vblank_pipes argument to the driver structure which tells us
how many to set up
this means that intel doesn't lose all vblank count on vtswitch (it
disables the interrupt there), i've heard of a few uvm_faults where this
happens as well as things just going wrong.
This was suggested by Keith Packard who provided a different diff for
drm.git.
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on the softc.
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The pipestat register needs tweaking when enabling vblanks, and doing this and
playing with the IMR seems to lead to problems, so just leave them always
unmasked and just tweak PIPESTAT.
From Keith Packard at Intel.
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support yet, but will) it won't exist, prepare for this by only writing to it if
it's there.
Bits of this came from Eric Anholt at intel.
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using it allowed rendering to continue while waiting for a vblank swap,
and often this lead to flickering and rendering a new scene before the
swap. this broke a lot of things.
With the removal of this swap, userland falls back to the old way of
waiting for the vblank then doing the swap itself, this is smooth
enough.
I decided independantly to kill this, but the intel guys recently
concurred. Comment change comes from Eric Anholt at intel.
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pipestat register. Fixes a nasty race where the bit would get set
without being reflected in the interrupt register, so we'd never get
another vblank interrupt.
Also, use the user_irq_lock to also protect vblank register writes, since it
covers the same register.
From Eric Anholt and Keith Packard at Intel.
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Not strictly needed in the non-gem case, but it will be needed then, and
doesn't hurt now.
From Eric Anholt at intel.
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doesn't handle triple buffering (which has been marked ``don't use this,
it's unstable'' for ever anyway)
While the code just removed is in drm git. it's not planned to go any
further, due to being a horribly ugly hack. Instead a proper fix which
will depend on memory management is planned. So revert this stuff here,
since it's now dead.
Testing shows no regressions.
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it.
Since the vblank handling got reworked this is very much unneeded.
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Some ideas taken from upstream.
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them wrong in several cases that i've noticed and Merging when needed is
still fairly simple, anyway. This shaves another 500 bytes from an amd64
kernel due to not having to flip the sign on some things. It also stops
my eyes bleeding.
Tested by a few along with the last diff that went in.
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needs the actual interrupts. Oops!
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from drm git.
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definitively gone for GEM so this will not be needed.
No binary change.
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Some stability fixes for radeon. The most part of this diff is related
to fixing up the VBLANK (vertical blank interrupt) handling. Now, if the
X driver supports the DRM_IOCTL_MODESET_CTL ioctl, (to be used when
changing the video modes), then allow the vblank to be disabled once
that ioctl has been called. Otherwise, keep the interrupt enabled at all
time, since disabling it otherwise will lead to problems.
Tested by a few. "no problem" on API/ABI deraadt@.
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changes:
- Support for intel 4 series chipsets (i'll do any relavent agp bits for
these as soon as i grab the datasheet and find a testcase)
- fix scheduled buffer swaps on non 965 chipsets
- major reorder, dedup and general cleanup of register definition and
the header file
Tested by a few, no regressions
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