| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | sizes for free(); ok sthen |   deraadt | 2015-09-10 | 1 | -8/+14 |
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| * | Print speeds consistently. |   mpi | 2015-03-21 | 1 | -10/+10 |
| | | | | | ok brynet@, miod@ | ||||
| * | Remove some includes include-what-you-use claims don't |   jsg | 2015-03-14 | 1 | -2/+1 |
| | | | | | | | | have any direct symbols used. Tested for indirect use by compiling amd64/i386/sparc64 kernels. ok tedu@ deraadt@ | ||||
| * | match on C610 | jsg | 2015-01-09 | 1 | -1/+13 |
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| * | Use <sys/endian.h> instead of <machine/endian.h> |   guenther | 2014-12-19 | 1 | -2/+2 |
| | | | | | ok dlg@ mpi@ bcook@ millert@ miod@ | ||||
| * | Additonal registers needs to be saved in sc_save2, not sc_save. |   kettenis | 2014-10-16 | 1 | -5/+5 |
| | | | | | ok deraadt@ | ||||
| * | match on Intel 9 series and 9 series LP PCH, and add 8 series KT to puc | jsg | 2014-08-13 | 1 | -1/+9 |
| | | | | | ok millert@ | ||||
| * | pciide.c, pciide_rdc_reg.h(new): ported rdcide(4) from NetBSD. |   sasano | 2014-07-13 | 1 | -2/+163 |
| | | | | | | | | | it supports RDC's R1012 IDE controller. tested on 86duino EduCake (DM&P Vortex86EX SoC) ok by deraadt@ | ||||
| * | add a size argument to free. will be used soon, but for now default to 0. |   tedu | 2014-07-12 | 1 | -2/+2 |
| | | | | | after discussions with beck deraadt kettenis. | ||||
| * | no need to check for default_chip_map twice in one if statement | jsg | 2014-04-24 | 1 | -2/+1 |
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| * | match some more intel sata devices in ide mode | jsg | 2014-04-24 | 1 | -1/+73 |
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| * | Add a DVACT_WAKEUP op to the *_activate() API. This is called after the | deraadt | 2013-12-06 | 1 | -7/+4 |
| | | | | | | | | | kernel resumes normal (non-cold, able to run processes, etc) operation. Previously we were relying on specific DVACT_RESUME op's in drivers creating callback/threads themselves, but that has become too common, indicating the need for a built-in mechanism. ok dlg kettenis, tested by a sufficient amount of people | ||||
| * | Fix edge cases of uninitialized variables. In my tree for too long, I even |   miod | 2013-05-27 | 1 | -1/+2 |
| | | | | | got ok's for azalia but I don't remember from whom. | ||||
| * | - add some intel 7 series sata ids. |   jasper | 2013-01-05 | 1 | -1/+13 |
| | | | | | ok jsg@ | ||||
| * | Revamp the sequences for suspend/hibernate -> resume so that the code | deraadt | 2012-10-08 | 1 | -1/+4 |
| | | | | | | | | | | | paths are reflexive. It is now possible to fail part-way through a suspend sequence, and recover along the resume code path. Split DVACT_SUSPEND by adding a new DVACT_POWERDOWN method is used after hibernate (and suspend too) to finish the job. Some drivers must be converted at the same time to use this instead of shutdown hooks (the others will follow at a later time) ok kettenis mlarkin | ||||
| * | VT6410 and VT6415 controllers do not implement the `channel enable' register, | miod | 2012-04-22 | 1 | -17/+27 |
| | | | | | | | so don't incorrectly assume both channels are disabled on these controllers. ok jsg@ | ||||
| * | Don't call wdcintr() for channels that aren't properly initialized or don't | kettenis | 2012-03-13 | 1 | -1/+4 |
| | | | | | | | | have any drives on them. Fixes a panic seen on sparc64 machines with that pesky Acer Labs chipset. ok deraadt@, krw@, henning@ | ||||
| * | As SiS IDE has the same PCI product id for different revisions | jsg | 2012-01-15 | 1 | -2/+4 |
| | | | | | | | | with different bugs the host bridge is used to determine which path to take. As pointed out by Chris Cappuccio we need to expand this list to cover newer chips SiS have inflicted on the world. From and tested by Loganaden Velvindron (on SiS 968). | ||||
| * | Add support for SiS 1183 SATA. From/tested by Loganaden Velvindron. | jsg | 2012-01-04 | 1 | -1/+5 |
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| * | Unbreak tree after kettenis's sanitization in pcidevs | guenther | 2011-11-12 | 1 | -9/+9 |
| | | | | | ok krw@ | ||||
| * | Make sure we set UDMA capabilities for HT-1000 IDE, | jsg | 2011-11-02 | 1 | -1/+2 |
| | | | | | | this was missed when support for HT-1000 IDE was added. From Brad. | ||||
| * | use default_chip_unmap for sata_chip_map, lets the via controllers detach | jsg | 2011-09-17 | 1 | -1/+2 |
| | | | | | ok deraadt@ | ||||
| * | Cope with the start-dma-before-init errata and some other register setup | deraadt | 2011-07-15 | 1 | -1/+12 |
| | | | | | | errata for the Serverworks SATA chipset found on the macppc xserve G5. ok jmc | ||||
| * | pass the interface for non-compat-mode piix. from netbsd. |   jcs | 2011-07-11 | 1 | -7/+6 |
| | | | | | ok deraadt@ jsg@ | ||||
| * | Refactor queue allocation and initialization into a wdc_alloc_queue() |   matthew | 2011-05-09 | 1 | -20/+14 |
| | | | | | | | | | | | | function, and let attachment code calls this rather than malloc(9). This prevents re-initialization of the queue in shared queue chipsets. Also, add wdc_free_queue() as a complementary function. Earlier version (without wdc_free_queue()) tested by sthen@ and Amit Kulkarni on various pciide(4) chips. ok dlg@ | ||||
| * | Initialize the wdc ata_drive_datas structs earlier in wdcattach() so | matthew | 2011-05-09 | 1 | -22/+4 |
| | | | | | | | | | | that chip-specific drv_probe routines can assume they've already been initialized. Tested by sthen@ on i386, armish, and amd64, with both affected and non-affected pciide(4) chips. ok dlg@ | ||||
| * | support Intel 6 series SATA in non raid/non ahci mode. | jsg | 2011-04-27 | 1 | -1/+17 |
| | | | | | tested by Daniel Dickman | ||||
| * | keep an eye out for wdc registers returning 0xff. if they return 0xff, | deraadt | 2011-04-18 | 1 | -1/+3 |
| | | | | | | | | | this probably means the controller is dead -- as in, a hot plug eject event. in that case, mark the driver dead and try harder to return -1 in the interrupt handler. tested by many ok dlg, miod did not object | ||||
| * | add support for VIA VT6415 & VX900 IDE | jsg | 2011-04-14 | 1 | -2/+12 |
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| * | Avoid using an uninitialized variable when downgrading PIO mode too much on | miod | 2011-04-07 | 1 | -1/+2 |
| | | | | | ITExpress chipsets. (similar to 1.243, with a deja vu) | ||||
| * | use nitems(); no binary change for drivers that are compiled on amd64. | jasper | 2011-04-03 | 1 | -23/+21 |
| | | | | | ok claudio@ | ||||
| * | Mark NVIDIA MCP89 SATA controllers as such. Makes them use DMA instead of PIO | kettenis | 2010-11-18 | 1 | -1/+17 |
| | | | | | | | such that we get decent performance out of them. ok jsg@ | ||||
| * | Revision 0xc4 and earlier of the Acer Labs M5229 UDMA IDE controller can't do | kettenis | 2010-11-06 | 1 | -1/+15 |
| | | | | | | | | | | | DMA for LBA48 commands. Work around this issue by (silently) falling back to PIO for LBA48 commands. Access to the tail end of large disks will be much slower, but at least it works. From NetBSD (Takeshi Nakayama). ok jsg@, krw@, deraadt@ | ||||
| * | Add DVACT_QUIECE support. This is called before splhigh() and before | deraadt | 2010-08-31 | 1 | -1/+4 |
| | | | | | | | | | DVACT_SUSPEND, therefore DVACT_QUIECE can do standard sleeping operations to get ready. Discussed quite a while back with kettenis and jakemsr, oga suddenly needed it as well and wrote half of it, so it was time to finish it. proofread by miod. | ||||
| * | no need to specially handle the 4 AMD756 registers at suspend/resume time; | deraadt | 2010-08-31 | 1 | -19/+2 |
| | | | | | | they fall within the pcipower() handled range. ok miod | ||||
| * | PCI configuration space register save/restore for AMD756. | miod | 2010-08-31 | 1 | -1/+19 |
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| * | ok, that is the last of the easy chips to check for register saves. i'm | deraadt | 2010-08-06 | 1 | -2/+3 |
| | | | | | | going to give up on reading gobs of crap for a while and hope that someone else takes on the next few. | ||||
| * | another set of chips which do not need register rewrites at resume time | deraadt | 2010-08-06 | 1 | -1/+2 |
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| * | no special registers to restore on via chips either | deraadt | 2010-08-03 | 1 | -2/+3 |
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| * | jmicron code was writing to the wrong register; ok jsg | deraadt | 2010-08-02 | 1 | -2/+2 |
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| * | Save/restore more registers at suspend/resume for those chips which look | deraadt | 2010-08-02 | 1 | -9/+28 |
| | | | | | like they need it. (Or don't, when it appears they don't need it) | ||||
| * | the default pciide chip needs no additional register restores; tested by jcs on one model | deraadt | 2010-07-28 | 1 | -2/+4 |
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| * | suspend save/restore for SIS3112; tested by mlarkin | deraadt | 2010-07-28 | 1 | -1/+13 |
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| * | Manuel Bouyer rescinded clauses 3 and 4 of his license text. | jsg | 2010-07-23 | 1 | -7/+1 |
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| * | For suspend/reume, ATI IXP chips (might) need 0x40-0x56 saved.. but | deraadt | 2010-07-23 | 1 | -5/+3 |
| | | | | | these the 6 registers already saved | ||||
| * | When suspending, save & restore as many registers as we can from the | deraadt | 2010-07-22 | 1 | -2/+54 |
| | | | | | | | | | | pciide front-ends chips. More registers will have to added here, chip by chip (warning messages about unknown chipsets, on resume, mean that you should talk to me). Also call the wdc back-end (our child) to have it reset the controller properly on resume. This makes all pciide that we've tested unsuspend. ok kettenis mlarkin | ||||
| * | Don't write garbage to the config space for phison, | jsg | 2010-04-20 | 1 | -5/+1 |
| | | | | | | | | | we shouldn't be touching the config space at all here. Found by the clang static analyser. ok deraadt | ||||
| * | Send "STANDBY IMMEDIATE" command to ATA disks upon suspend. For this to work, | kettenis | 2010-04-11 | 1 | -3/+21 |
| | | | | | | | | | | pciide(4) needs to formward DVACT_SUSPEND and DVACT_RESUME events to its children, so do that. Gets rid of the nasty "click" sound from the disk on many laptops. ok marco@, jsg@ | ||||
| * | EP80579 SATA | jsg | 2009-11-21 | 1 | -1/+5 |
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| * | add support for the ati sb900^Whudson2 chips. |   dlg | 2009-11-01 | 1 | -1/+5 |
| | | | | | from brad | ||||
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