summaryrefslogtreecommitdiffstats
path: root/sys/dev/pci/pciide.c (follow)
Commit message (Collapse)AuthorAgeFilesLines
...
* Don't write garbage to the config space for phison,jsg2010-04-201-5/+1
| | | | | | | | we shouldn't be touching the config space at all here. Found by the clang static analyser. ok deraadt
* Send "STANDBY IMMEDIATE" command to ATA disks upon suspend. For this to work,kettenis2010-04-111-3/+21
| | | | | | | | | pciide(4) needs to formward DVACT_SUSPEND and DVACT_RESUME events to its children, so do that. Gets rid of the nasty "click" sound from the disk on many laptops. ok marco@, jsg@
* EP80579 SATAjsg2009-11-211-1/+5
|
* add support for the ati sb900^Whudson2 chips.dlg2009-11-011-1/+5
| | | | from brad
* Match on Intel 3400 SATA.jsg2009-10-181-1/+25
| | | | Tested by bwaichu@yahoo.com.
* Match on MCP77 SATA.jsg2009-10-171-1/+5
| | | | From and tested by minusf@obiit.org
* Correct udma timing register offset and the udma mode ceilingjsg2009-10-131-2/+2
| | | | | | we allow for Intel SCH chips. From tharada@oucrc.org in PR 6232, verified against the datasheet.
* Fill pciide_unmapregs_compat() with stuff which might work, if we ever getderaadt2009-10-051-2/+14
| | | | | there. ok jsg
* Add some minimalistic detach/unmap bits for pciide,jsg2009-10-051-4/+95
| | | | | | | | | | | | done using a chipset unmap callback. Still needs to work to distinguish between compat register mappings and compat interrupts so we don't get caught out. Tested with a diskless sii3112 CardBus eSATA controller by me, and testing and feedback by deraadt@ with a phison based expresscard SSD.
* Support the Phison PS5000. IO Data and other vendors are now using thisderaadt2009-09-291-2/+130
| | | | | on an expresscard SSD adaptor. ok jsg
* Remove unnecessary assignments in sii311[24]_chip_map().miod2009-09-051-3/+3
|
* Minor KNF from Brad. No binary change.sthen2009-08-021-3/+3
|
* add the VIA VX855 chipsetkevlo2009-06-261-2/+7
| | | | ok deraadt@
* Add SCH IDE support code.jsg2009-05-311-1/+119
| | | | Tested on a p series vaio.
* Add support for ICH10 SATA devices not operating in AHCI mode.jsg2009-04-241-1/+17
| | | | Tested by Christian Stuermer.
* Match on native/legacy MCP79 SATA ids.jsg2009-02-071-1/+17
| | | | From/Tested by Laurence Tratt on an asus p5n7a board.
* Add support for CS5535 IDE adapted from the gcscide code in NetBSDjsg2009-01-041-1/+11
| | | | | | | | | | | | | originally written by Juan Romero Pardines. Thanks to Lars Kotthoff for testing on a HeroLogic HL-463 system. Because the CS5535 doesn't provide SMM emulated PCI access to set DMA/PIO modes or a real PCI IDE controller we have to resort to making MSR calls. As this is very MD specific, hide most of uglyness away in i386 MD pciide code. ok grange@
* Shift prototypes for some common pciide functions out intojsg2009-01-041-36/+1
| | | | | | a header file where MD code can get at them. ok grange@
* backout Tadpole specific non-dma workaround commited in 1.287, since itderaadt2008-10-021-21/+1
| | | | | | appears the machine Mark got had a disk which failed very soon after that ok kettenis
* remove dead stores and newly created unused variable.chl2008-09-251-4/+1
| | | | | | Found by LLVM/Clang Static Analyzer. ok brad@
* Update for renamed ATI PCI ids.brad2008-09-171-9/+9
|
* Add an ugly hack to disable DMA on the Tadpole SPARCLE laptop. It doesn'tkettenis2008-07-291-1/+21
| | | | | | | work and this way we fall back on PIO which does work. I'm pretty sure this is caused by bugs in our code, but I cannot find them. ok deraadt@, marco@
* Remove the IDE_PCI_CLASS_OVERRIDE quirk flag for the Intel AHCI controllersbrad2008-07-081-7/+7
| | | | | | | as they're of the subclass SATA and the SiI3512 SATA controller as it is of the subclass MISC. ok jsg@
* pciide_match() is a bit convoluted, we match anything claimingjsg2008-07-061-1/+2
| | | | | | | | | | | | | | | | | | | | to be MASS_STORAGE subclass IDE regardless of id, and other ids depending on the subclass and a known id or a known id and the override flag. We really want to check the subclass so we don't attach pciide to the wrong function of a chip, which happened last time around before the additional subclasses were checked in the non override case and the overrides were pulled. A bunch of the override flags were pulled after some common subclasses (SATA/RAID) were added. So if we have a known id and a SATA/RAID subclass we would match. Turns out some Silicon Image SATA devices claim to be of subclass MISC so add that as well. Unbreaks one of hennings machines with 3114 SATA and likely quite a few other machines. 'seems safe enough to me' miod@
* Restore IDE_PCI_CLASS_OVERRIDE on SiI3512 SATA.maja2008-06-131-2/+2
| | | | | | | On socppc it has the subclass PCI_SUBCLASS_MASS_STORAGE_MISC so without the quirk socppc will not find its disk. -moj
* Remove the IDE_PCI_CLASS_OVERRIDE quirk flag for Intel (except AHCI),brad2008-06-111-38/+38
| | | | | | | CMD Technology, Silicon Image, VIA, SiS, Broadcom, and ATI IDE/SATA chipsets. ok jsg@
* Change sis_chip_map() to use pci_find_device() as the originaljsg2008-04-291-24/+7
| | | | | | | | | | | | | | NetBSD code it was based on did/does, now we have it. This makes detecting sis 96x work properly without having to do silly things like adding host bridges in the list. Of course we wouldn't be in this mess in the first place if sis designed their chips properly instead of reusing the same pci id. Add 964/965 devices while here. Tested by todd@ on a machine with 965.
* Add ICH8M SATA IDE support, and adjust for renamed ICH7 and ICH8 IDs.kettenis2008-02-271-10/+14
| | | | tested by drahn@, "looks right to me" deraadt@
* de-inline pciide, shaving a goodly amount off the kernelblambert2008-02-051-33/+15
| | | | ok jsg@ "please kill it" marco@ "no objections" krw@
* Add support for VIA VT8237S SATA.jsg2008-01-291-1/+5
| | | | From Antonio Marques <froz@icix.org> in PR 5718.
* Turns out the id I thought was both CX700/VX700 IDE was only for VX700,jsg2008-01-111-2/+7
| | | | | | | so rename it and add a CX700 id. Tweaked version of a diff from dtrombley@dslindiana.com who tested with a board with the new id.
* Add the ATI SB700 chipset.brad2008-01-021-1/+5
| | | | ok dlg@
* typos; ok jmc@martynas2007-11-271-2/+2
| | | | sys/dev/pci/pciide.c from naddy@
* Add the Intel ICH9 chipset.brad2007-10-171-1/+25
| | | | | | Tested by damien@ ok dlg@
* malloc+bzero -> malloc+M_ZERO. Use 'malloc(sizeof(*p) ...' idiom.krw2007-10-091-17/+7
|
* add the NVIDIA MCP73/MCP77 IDE controller PCI ids.brad2007-09-141-1/+9
| | | | ok dlg@
* kettenis suggested that i can use pci_intr_map twice on the same devicedlg2007-07-021-2/+22
| | | | | | | | safely, so i tried it and it worked great. i can reuse the pci_attach_args to attach ahci and now pciide to jmb without really modifying either of them. lots of code shrinks. ok jsg@
* Make natsemi_pci_intr() use pciide_intr_flag(). Needed on the PC87415 partkettenis2007-06-261-17/+11
| | | | | | | integrated on the PC87560 Legacy IO chip found on several hppa workstation models. ok jsg@
* Add support for VIA CX700/VX700 IDE.jsg2007-06-201-2/+7
| | | | Tested by jcs@ on a model 2 oqo.
* Add support for ICH8M IDE.jsg2007-06-021-2/+11
| | | | | | | Tested by Daniel Dickman <didickman@gmail.com> pciide(4) does not need to be updated as it does not split SATA/IDE support up into different sections (ICH8M already listed).
* Ditch acard_pci_intr() as nothing currently uses it.jsg2007-05-111-36/+1
| | | | Pointed out by deraadt@
* Don't skip channels that don't have the WDCF_IRQ_WAIT flag set. Apparentlykettenis2007-05-101-4/+1
| | | | | | | some chips generate interrupts we don't expect, but we need to ack those. Fixes the cdrom hangs on various sparc64 systems. tested by some, ok deraadt@
* Another VIA VT8237A SATA.jsg2007-05-021-1/+5
| | | | Tested by Graeme Lee <graeme@omni.net.au>
* this level of serverworks sata does not helpderaadt2007-03-271-3/+1
|
* disable serverworks sata until it works (been busted for a year on thederaadt2007-03-271-1/+3
| | | | G5, might work a lot better soon)
* Basic support for JMicron PATA.jsg2007-03-211-2/+159
| | | | | | | | JMB368 supported for now, multi port cards that share PATA/SATA need to do a complicated internal channel mapping dance I plan to look into next. ok grange@
* fix dmesg printing for the artisea chipset.brad2006-11-211-3/+2
|
* Re-enable the Intel i31244 support now that real hardware actually exists.brad2006-11-191-10/+6
|
* add the MCP67 PATA and SATA PCI ids as well as fixing nforce_chip_map() tobrad2006-11-051-12/+22
| | | | | | set the proper UDMA capability for MCP61 and MCP65 chipsets. ok jsg@
* Match the IDE controller in the AMD Geode companion device CS5536.tom2006-10-191-1/+5
| | | | | | The disk in the AMD Geode LX-800-based system now works much faster. hints grange@; ok jsg@
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.