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* Nuke variable 'ba'. Only use was removed in r1.230.krw2020-11-121-3/+1
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* use RWLOCK_INITIALIZER() in DEFINE_MUTEX()jsg2020-11-122-2/+2
| | | | | | | | | | Gives rwlocks defined this way a non-NULL rwl_name. Move ttm_pool_shrink_scan() DEFINE_MUTEX use out of function scope to fix build with WITNESS after this change and expand macro to have a better name than "lock". Found by and ok semarie@
* use a single preinitialised mutex for atomic64 fallback pathjsg2020-11-092-15/+22
| | | | | | | | | | | Previously we would initialise a variable specific mutex in ATOMIC64_INIT() or atomic64_set() but the drm code in multiple places zeroes memory and later accesses it without calling these resulting in a mutex with IPL_NONE instead of IPL_HIGH. Fixes a 'locking against myself' panic reported by Anthony Richardby on macppc with PowerBook5,6 and RV350. ok kettenis@
* There seems to be a silicon errata for 82598 ix(4) chips. When thebluhm2020-11-091-7/+21
| | | | | | | | | link state changes and an interrupt is fired for that, the MSI-X interrupt mask bits of the queues are cleared. During init while the queues are enabled by the driver, the hardware disabled them in the background. Then receiving packets did not work. In MSI-X mode, use the FreeBSD logic to read the cause from EICS register. from Christiano Haesbaert; tested with 82599 and X540T and OK jmatthew@
* use 64 bit atomic builtins on i386 for atomic64jsg2020-11-091-2/+4
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* vblank seqlock is used from interrupt context so use IPL_TTYjsg2020-11-081-1/+1
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* change from rwlock(9) to mutex(9) for linux rwlocksjsg2020-11-074-12/+8
| | | | | | | | | Linux rwlocks are read/write spin locks which don't sleep. Fixes a panic claudio@ reported with a WITNESS kernel on inteldrm(4) 'panic: acquiring blockable sleep lock with spinlock or critical section held (rwlock) drmvma' Patch from kettenis@ with a small tweak from me. ok kettenis@
* Remove unused `anon' argument from uvmfault_unlockall().mpi2020-11-061-3/+3
| | | | | | | | | It won't be used when amap and anon locking will be introduced. This "fixes" passing a unrelated/uninitialized pointer in an error path in case of memory shortage. ok kettenis@
* Remove unused `anon' argument from uvmfault_unlockall().mpi2020-11-063-9/+9
| | | | | | | | | It won't be used when amap and anon locking will be introduced. This "fixes" passing a unrelated/uninitialized pointer in an error path in case of memory shortage. ok kettenis@
* move definitions which should be in rwsem.hjsg2020-11-063-6/+14
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* Match on ConnectX-6 (non-Dx) cards too.jmatthew2020-11-061-1/+2
| | | | tested by Nilson Lopes
* Bail out early if the port type is not Ethernet, rather than failing laterjmatthew2020-11-061-1/+8
| | | | | | | on in the attach process with a useless error message. tested on a ConnectX-6 card in infiniband mode by Nilson Lopes ok dlg@
* add support for ctl reads and writes on 710 chips with API < 1.5dlg2020-11-021-6/+28
| | | | | | | | this gets rid of some annoying errors when bringing such an interface up, but more importantly is allows RSS to work on these boards with older firmware. ok jmatthew@
* Update the RTL8125B microcode and use ifiq_input and its return value tokevlo2020-10-312-23/+24
| | | | apply backpressure to rxrs.
* We need more memory barriers on powerpc.kettenis2020-10-291-7/+13
| | | | ok tobhe@
* Silence "using MMIO for ATOM IIO" error message, since that is normal onkettenis2020-10-291-0/+2
| | | | | | POWER9 machines. ok jsg@
* regenkettenis2020-10-282-2/+12
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* Fujitsu SPARC64 X CPI host bridge and another PLX PCIe switch.kettenis2020-10-281-1/+3
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* Switch from bus_space_read/write to linux io.h interfaces for alljsg2020-10-286-71/+30
| | | | | | pci "memory space" io. Further reduces the diff to linux. ok kettenis@
* Use the function from <linux/io.h> for all "Memory Space" IO. This reduceskettenis2020-10-285-24/+21
| | | | | | | the diffs to Linux and makes sure we use memory barriers in the same way as Linux does. ok jsg@ (who added the doorbell changes)
* Add missing bus_space_barrier() in mcx_cmdq_post() - without this, cmdqjmatthew2020-10-281-1/+3
| | | | | | | | | | operations during attach fail on some amd64 systems using the TSC delay function, seemingly as there aren't enough memory operations happening to get the doorbell write out to the device otherwise. The lapic delay function didn't expose this problem. suggested by kettenis@ ok dlg@
* Do not touch non existing queues. Allows to disable MSI-X in ix(4).bluhm2020-10-271-2/+3
| | | | OK jmatthew@
* Make mapping the "I/O Space" BAR optional. POWER9 systems don't supportkettenis2020-10-261-14/+7
| | | | | | | "I/O Space" on their PCIe host bridges and for most (all) Radeon variants there is an alternative method to access the relevant registers. ok jsg@
* Improve I/O functions to match Linux:kettenis2020-10-261-9/+100
| | | | | | | | | | - Reverse byte order on big-endian architectures (except on sparc64) - Add memory barriers Note that sparc64 is special as we use a little-endian mapping for PCI bus space, so we shouldn't reverse the byte order there. ok jsg@
* remove unused alpha memory barrier definesjsg2020-10-261-5/+1
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* use __membar() where possiblejsg2020-10-261-9/+9
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* use lwsync and eieio for smp barriers on powerpcjsg2020-10-261-4/+11
| | | | ok kettenis@
* Make mapping the "I/O Space" BAR optional. POWER9 systems don't supportkettenis2020-10-251-9/+6
| | | | | | | "I/O Space" on their PCIe host bridges and for most (all) Radeon variants there is an alternative method to access the relevant registers. ok jsg@
* Add firmload attribute to drivers that load firmware.kettenis2020-10-251-4/+4
| | | | ok jsg@
* enable snooping on more Intel devicesjsg2020-10-251-4/+14
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* regenjsg2020-10-252-7/+27
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* add more Intel azalia idsjsg2020-10-251-3/+7
| | | | | rename Intel 0xa171 The same id is used by HM175 QM175 CM238 (KBL-H), not just CM238.
* enable snooping on more AMD devicesjsg2020-10-251-1/+5
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* use pci macros when testing subvendor id for idt codecsjsg2020-10-251-10/+6
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* recognise some more realtek codecs found in submitted dmesgsjsg2020-10-251-1/+69
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* add entry for realtek alc3204/236;jmc2020-10-241-1/+9
| | | | patch cobbled together with assistance from (and ok) jsg;
* add support for AMD 17h/3xh HD Audio and the ALC887 codecrobert2020-10-224-2/+12
| | | | ok deraadt@
* Do not write unneeded data into the iwx(4) MAC context removal command.stsp2020-10-221-1/+9
| | | | | | | This extra data seems to trigger an assertion in the firmware and the Linux iwlwifi driver does not send this data either. tested by Nicola Dell'Uomo and jmc@
* handle capable(CAP_SYS_NICE) for allowing high priority contextsjsg2020-10-213-9/+10
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* Constify and use C99 initializer for "struct uvm_pagerops".mpi2020-10-212-7/+6
| | | | | | | | | While here put some KERNEL_ASSERT_LOCKED() in the functions called from the page fault handler. The removal of locking of `uobj' will need to be revisited and these are good indicator that something is missing and that many comments are lying. ok kettenis
* change drm_vma function arguments to take struct drm_file *jsg2020-10-217-17/+19
| | | | | reduces the diff to linux 5.7.y ok kettenis@
* use drm_mm from linux 5.7.yjsg2020-10-207-494/+498
| | | | | | | | | | | | | | | | | Without this boot time tests from setting amdgpu_testing = 1 fail. For example on Vega 56: drm: GART: 512M 0x0000000000000000 - 0x000000001FFFFFFF ... [drm] Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0xa00000 [drm] Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0xb00000 ... [drm] Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x1fe00000 [drm] Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x1ff00000 [drm] *ERROR* 0xffff80000135f858 bind failed Error while testing BO move ok kettenis@
* Fix several bugs in the TTM page fault handler and porperly integrate all thekettenis2020-10-181-89/+193
| | | | | | changes made to Linux 5.7. Pointed out by jsg@. ok jsg@
* Avoid a possible dead-lock in kthread_stop(): when stopping, wakeup()semarie2020-10-171-1/+3
| | | | | | | | | the caller of kthread_stop(). The thread should also be unparked as else it will not seen the KTHREAD_SHOULDSTOP flag. it follows what Linux is doing. ok kettenis@
* remove uneeded pool.h includejsg2020-10-161-1/+0
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* implement linux interval tree functionsjsg2020-10-163-37/+68
| | | | | Adapt kettenis' amdgpu interval tree replacement functions for the interval_tree.h functions radeondrm uses on cayman, aruba and GCN.
* Replace simple one-line bcopy()/memcpy() of faked data into scsi_xfer with callkrw2020-10-151-4/+4
| | | | | to scsi_copy_internal_data(). Thus getting xs->resid properly set and adding the usual uio/size sanity checks.
* consistently use dev_info() for sos fw version messagesjsg2020-10-152-2/+2
| | | | noticed in renoir dmesg
* don't print pci ids when radeondrm attachesjsg2020-10-151-1/+2
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* don't print pci ids when amdgpu attachesjsg2020-10-151-1/+22
| | | | | Print asic name, rev and number of compute units. Suggested by and ok kettenis@
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