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path: root/sys/dev/usb/dwc2
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2021-01-28Rename bNumInterface to bNumInterfaces to fix build on arm64.kurt1-2/+2
2020-04-03Move the responsibility of syncing the data buffers from the USBpatrick1-1/+15
stack into the USB controller driver, since not all of the xfers actually use DMA and some invalidations might even be harmful. The important part is to sync before handing the buffer to the controller, and to sync on a successful transfer before handing it back to the USB stack. For isoc transfers it's easier to sync the complete length of the transfer, since the buffer to flush is not filled in a contiguous fashion. For dwc2 there's a common point which takes care of the start of transfers from or to devices, where we can make sure that our buffers are synced. On completion, there's a common point before handing it off to the USB stack. For ehci there are three places which take care of the start of transfers from or to devices, where one already does the sync, while the two other places still need the sync. There are two completion handler (isoc and non-isoc), where one already has a comment asking for the need of a sync. The done handler for intr xfers does a sync that is not needed anymore after adding the sync in the completion handler. For ohci there are three places which take care of the start of transfers from or to devices, where all of them were still in need of the sync. For completion, there is one place for isoc xfers and two places for handling successful generic xfers. For uhci there are two places which take care of the start of transfers from or to device, where all of them were still in need of the sync. For completion, there is one handler for both isoc and non-isoc xfers where syncs need to occur. For xhci there are three places which take care of the start of transfers from or to device, where all of them were still in need of the sync. For completion, there is one handler for isoc and one for non-isoc xfers where syncs need to occur. With this we can revert the workaround that implicitly allocated buffers are COHERENT, since now control transfers fulfilled by the driver code (instead of the controller doing DMA) are not flushed into oblivion anymore. Tested by Janne Johansson with dwc2 (octeon) Tested by kettenis@ with xhci(4) (octeon) Tested by patrick@ with ehci(4) on a Cubox-i (armv7) Tested by patrick@ with xhci(4) on an i.MX8MQ (arm64) Tested by tobhe@ with dwc2 on a rPi 3b (arm64) ok kettenis@
2020-03-21Instead of passing the flags as part of a struct that's supposed to bepatrick3-12/+8
filled by the callee, change the usb_allocmem() API to take another argument for the flags. ok mpi@
2020-03-19Switch USB to use non-coherent buffers for data transfers. Sincepatrick3-3/+8
the import in '99 all buffers allocated using usb_allocmem() have been mapped COHERENT. On some ARM SoCs, where the USB controller is not coherent with the caches, this means the buffers were mapped uncached. This drastically reduces the performance, especially on reads. We already added cache syncs before and after USB transfers, but so far those have essentially been no-ops. Since other drivers make use of the same allocation code, and those haven't been proven to have correct syncs, we can't just remove the COHERENT flag. This splits the allocation into coherent and non-coherent blocks. All drivers who call usb_allocmem() themselves now pass a flag to show they require coherent blocks. Onced verified that they also work fine without coherent, or once they have been refactored, we can remove this again. On a ure(4) connected to an i.MX8MQ, the receive performance is 10x as fast as before. The Raspberry Pi's ethernet receive speed doubled. Debugged using dt(4) Original diff from Marius Strobl Feedback from kettenis@ Tested on an i.MX8MQ (arm64) by patrick@ Tested on a Raspberry Pi (arm64) by tobhe@ Tested on an ERL (octeon) by Janne Johansson ok mpi@ gerhard@ tobhe@
2019-11-27Convert infinite sleeps to tsleep_nsec(9).mpi1-2/+2
ok bluhm@
2019-03-14Use non-blocking allocation in dwc2_allocx() to makevisa1-2/+6
the routine safe to use in soft interrupt context. This fixes an assertwaitok() panic reported by Abel Abraham Camarillo Ojeda. OK mpi@
2019-03-11Add missing bus powered bit, from aalm@mpi1-2/+2
2017-09-08If you use sys/param.h, you don't need sys/types.hderaadt5-10/+5
2017-09-05EPROTO is now in sys/errno.hotto1-2/+1
2017-06-29kill RCSID macros; discussed with millertderaadt7-40/+7
2017-06-20Check the validity of the `qtd' pointer after each interrupt casevisa1-11/+57
and bail out if the pointer has become invalid. This prevents use-after-free memory accesses that corrupted the dwc2qtd pool. This fix improves stability on the Raspberry Pi 3. From Linux commit dc8730846948e517169f630826cd2c97615f5ee8 OK kettenis@
2017-05-15Replace remaining SPLUSBCHECK by a splsoftassert(IPL_SOFTUSB).mpi1-2/+2
USB is the last real user of IPL_SOFTNET.
2017-04-30Rename Debugger() into db_enter().mpi1-2/+2
Using a name with the 'db_' prefix makes it invisible from the dynamic profiler. ok deraadt@, kettenis@, visa@
2017-04-11Partially revert previous mallocarray conversions that containdhill1-7/+7
constants. The consensus is that if both operands are constant, we don't need mallocarray. Reminded by tedu@ ok deraadt@
2017-04-09Convert some malloc(9) to mallocarray(9)dhill2-9/+9
ok deraadt@
2017-03-10Fix a use-after-free when sending root hub control transfers.mpi1-2/+2
*_root_ctrl_start() routines are synchronous and all end up calling usb_transfer_complete() in the non-error case. After calling this function it is unsafe to dereference ``xfer'' since the transfer callback has been called. So returning USBD_IN_PROGRESS is wrong in this case since transfers are always completed at this point. So return USBD_NORMAL_COMPLETION or the corresponding error code if something wrong happen.
2017-03-10Move per HC polling code to the stack.mpi1-47/+1
This code contains a use-after-free which be addressed in an upcoming diff. This fix xhci(4) polling mode. ok kettenis@
2017-02-16Remove an unnecessary NULL pointer check.visa1-7/+4
OK stsp@
2017-02-15Align mutex IPL with the interrupt handler's priority.visa1-2/+2
Spotted by stsp@; OK jmatthew@
2017-02-12Replace dummy mutex asserts with real ones.visa4-9/+7
OK stsp@
2017-02-04Prefer <sys/endian.h> to <machine/endian.h>guenther1-2/+2
ok visa@
2017-01-29In dwctwo(4), fix an off-by-one in frame interval calculation.stsp1-3/+3
Fix stolen from Linux commit 9ed04d976146cf10dfa4c71171434af7c0348747 ok visa@
2016-09-24Remove unused functions.kettenis2-59/+2
ok jmatthew@, visa@
2016-09-15all pools have their ipl set via pool_setipl, so fold it into pool_init.dlg1-7/+4
the ioff argument to pool_init() is unused and has been for many years, so this replaces it with an ipl argument. because the ipl will be set on init we no longer need pool_setipl. most of these changes have been done with coccinelle using the spatch below. cocci sucks at formatting code though, so i fixed that by hand. the manpage and subr_pool.c bits i did myself. ok tedu@ jmatthew@ @ipl@ expression pp; expression ipl; expression s, a, o, f, m, p; @@ -pool_init(pp, s, a, o, f, m, p); -pool_setipl(pp, ipl); +pool_init(pp, s, a, ipl, f, m, p);
2015-12-23Drop unused goto label.visa1-4/+3
2015-12-18Remove two error-on-NULL conditions for allocations that can't fail.mmcc2-11/+2
ok visa@
2015-09-03Properly cancel any pending USB abort task when aborting a transfervisa1-2/+13
and skip completed transfers in dwc2_abort_xfer(). This fixes some timeout-related crashes. Feedback and ok mpi@
2015-09-03Remove the abort_task field in struct dwc2_xfer. There is an identicalvisa2-8/+5
field in struct usbd_xfer which is part of dwc2_xfer. ok mpi@
2015-09-03Remove sc->sc_lock and add several splusb()'s in dwc2, to avoid avisa2-88/+15
possible lock recursion panic on transfer timeout. The lock is not needed yet because the USB stack is not MP-safe. ok mpi@, "makes sense" jasper@
2015-06-28Convert list_head lists into TAILQs and LISTs and fix up header includesjmatthew10-184/+189
so we can build dwc2 without extra stuff. tested by several edgerouter lite owners, ok jasper@
2015-06-26Revert previous. uvideo checks the transfered length of every frame andmpi1-5/+5
this break some devices. As found the hardway by Hugo Sastre via sobrado@
2015-06-22Do not update frame lengths to reflect what has really been transferedmpi1-5/+5
when an isochronous transfer is done. Frame lengths are just input values and no driver mess with them. ok ratchov@, jmatthew@
2015-06-08rearrange delayed_work to avoid the use of container_of while leaving it injmatthew5-22/+23
more or less the same shape. ok uebayasi@
2015-06-08refuse to do polled isochronous transfers, as other usb controller drivers dojmatthew1-4/+5
requested by mpi@
2015-06-08Ensure polled bulk, control and interrupt transfers actually poll, fixingjmatthew1-9/+6
panics on shutdown with various usb sticks. ok mpi@
2015-03-19Let it compile.mpi1-5/+5
2015-03-19Abort tasks are run in their own thead, that's why they need a specialmpi1-2/+2
type, from Patrick Wildt.
2015-03-19Use the same workaround as ehci(4) and ohci(4) in setaddr() to deal withmpi1-1/+26
half configured control pipe, from Patrick Wildt.
2015-02-14Handle (poll) HCD interrupt right after initialization to immediately markuebayasi1-1/+4
ports as enabled/connected.
2015-02-12Fix typos.uebayasi2-8/+8
2015-02-12Provide interface for external DMA address configuration.uebayasi6-12/+53
2015-02-12Remove a stray ;.uebayasi1-2/+2
2015-02-12Move register accessor macros to saner place.uebayasi2-7/+9
2015-02-12De-static for backtracing, but using #define to not change indent (for now).uebayasi9-264/+268
2015-02-12Simplify debug ifdefs.uebayasi1-2/+2
2015-02-12Don't panic even if parent port doesn't exist.uebayasi1-3/+5
2015-02-11- Fix thinko about struct usbd_xfer allocation.uebayasi2-10/+9
- Use bus_dma_tag_t held in struct usbd_bus.
2015-02-11Fix debug build, etc.uebayasi2-20/+23
2015-02-11Catch up with the new taskq_create(9) API.uebayasi2-5/+5
2015-02-10Adjust usb(9) API differences to at least compile.uebayasi6-65/+82
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