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AgeCommit message (Expand)AuthorFilesLines
2018-06-18Run the code to handle interrupts directly from the interrupt handlerkettenis1-3/+2
2018-06-17Use regmapkettenis3-75/+140
2018-06-17Resetting fec(4) also resets the MII control register. Since wepatrick1-1/+3
2018-06-17Add curly braces to the if-condition to make sure the bus widthpatrick1-3/+3
2018-06-17Add another missing clock for i.MX7D. This particular clock lives on thekettenis1-2/+20
2018-06-16regenjmatthew2-2/+32
2018-06-16add SAS3.5 megaraids in SAS HBA modejmatthew1-1/+7
2018-06-16Fix some i.MX7D clocks.kettenis1-4/+7
2018-06-16Add imxrtc(4), a driver for the "secure" RTC in the Low Power Domain of thekettenis2-1/+171
2018-06-15Use IPL_MPFLOOR for ipmi mutex to prevent a interrupt which requiresyasuoka1-3/+3
2018-06-12Enable on i.MX6SX and i.MX7.kettenis1-1/+2
2018-06-12Add a bunch of i.MX7 clocks.kettenis2-1/+67
2018-06-12Don't panic on I/O to unregistered regionspaces. Needed to unbreak the GPDmlarkin1-3/+5
2018-06-12axen(4): Identify the owner of some chatty printfsmlarkin1-6/+11
2018-06-11Add clock support for i.MX7D.kettenis2-15/+287
2018-06-11Also match on "fsl,imx6q-uart" such that this attaches on i.MX7.kettenis1-3/+6
2018-06-10Attach imxiomuxc(4) to i.MX7D as well.kettenis1-1/+2
2018-06-10Attach imxgpc(4) to i.MX7D as well.kettenis1-1/+2
2018-06-10Attach imxesdhc(4) to i.MX7D. Should attach to i.MX6SL as well.kettenis1-2/+4
2018-06-10Extract the i2c bitrate from imxiic(4)'s clock-frequency attribute.patrick1-5/+8
2018-06-08Handle AENs for logical disk creation and deletion.jmatthew1-1/+61
2018-06-08Rework sensors and bio(4) support to use the target number from the logicaljmatthew1-75/+90
2018-06-07Attach bwfm(4) to the Broadcom 4356 found in the GPD Pocket.patrick1-2/+7
2018-06-07Some PCIe-based bwfm(4) chips also require that we supply an NVRAMpatrick1-11/+30
2018-06-05Move pluart(4) to dev/fdt.kettenis2-1/+918
2018-06-04in non-DIAGNOSTIC kernels, rw_assert_wrlock becomes a nop which leaves thederaadt1-5/+3
2018-06-044-bit bus width is mandatory for SDIO cards that support High Speedpatrick3-7/+28
2018-06-04Switch to SDIO High Speed mode if the host controller supports it.patrick2-5/+37
2018-06-04imxesdhc(4) also supports High Speed mode for SD.patrick1-2/+2
2018-06-04Nuke unused variable.kevlo1-3/+2
2018-06-03Change the set_parent() interface to pass the full parent specificationkettenis2-8/+14
2018-06-03Make DMA work on Samsung Exynos. The crucial bit that makes it work iskettenis1-39/+119
2018-06-02Add more RK3399 clocks such that we can support assigned locks for thekettenis2-11/+162
2018-06-02Add fanpwr(4), a driver for the Fairchild FAN53555 voltage regulator.kettenis2-1/+256
2018-06-01Rockchip RK3288/3328/3399 pre-divide the clock. Take this into account whenkettenis1-4/+13
2018-06-01Add code to set the frequency of the SDMMC and SDIO clocks.kettenis1-1/+31
2018-06-01Pass flags for highspeed capabilities based on device tree properties.kettenis1-1/+6
2018-06-01Restrict DMA to the Rockchip RK3328 and RK3388 for now. There is somekettenis1-3/+4
2018-05-31Move com_fdt.c to dev/fdt since we can share it between armv7 and arm64 now.kettenis2-1/+164
2018-05-31Remove comcnspeed and comcnmode. They serve no purpose anymore. Configuringkettenis1-4/+1
2018-05-31Add sleep_finish_all(), which provides the common combo of sleep_finish(),guenther1-7/+2
2018-05-30Implement SDIO DMA support. This is achieved by wrapping thepatrick1-11/+53
2018-05-30For the upcoming SDIO DMA support we need to use DMA-able bufferpatrick1-25/+64
2018-05-30Clear the DMA select bits in case we use PIO instead of DMA. Somepatrick2-4/+6
2018-05-28Initialize FIFO watermark thresholds. Fixes DMA issues on controllers thatkettenis1-1/+9
2018-05-28Add clock support for i.MX8MQ. Most of the clocks can be configuredpatrick1-0/+245
2018-05-28Add clock support for i.MX8MQ. Most of the clocks can be configuredpatrick1-9/+278
2018-05-28Get MAC address from "local-mac-address" property if provided.kettenis1-2/+4
2018-05-27Add 20 MHz MMC clock.kettenis1-1/+2
2018-05-27Add Allwinner A64 support.kettenis1-2/+33