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2020-06-18Cache kernel SLB entries in per-CPU struct and restore them uponkettenis5-25/+74
2020-06-18Add pcamux(4), a driver for the PCA8548 I2C switch.kettenis3-2/+238
2020-06-18BCM5719 A1 seen in the wild.kettenis2-2/+4
2020-06-18Refuse to set 0 or a negative value for net.inet.tcp.synbucketlimit.mpi1-1/+14
2020-06-18Combine and replace duplicated code in pipex(4) and pppx(4) by new functionsmvs3-256/+147
2020-06-18Compare `so' and `sosp' types just after `sosp' obtaining. We can't splicemvs1-5/+5
2020-06-18Introduce stoeplitz_hash_n32() and use it to simplify the hash_ip*tb2-20/+14
2020-06-18The same simplification can be done a second time: widen the type,tb1-39/+22
2020-06-18Enable bwfm(4) on armv7 RAMDISK for SD/MMC and USB devices.fcambus1-1/+3
2020-06-18Now that the calls to stoeplitz_cache_entry() are out of the way, we cantb1-38/+9
2020-06-18The next step is to use that we have cached the result of the matrixtb1-45/+49
2020-06-17Fix broken HID descriptors of Elecom trackballs.bru4-4/+99
2020-06-17Print CPU name and cache info in the same way as we do on arm64.kettenis2-7/+95
2020-06-17More pmap bits, mostly from powerpc andd arm64.kettenis2-19/+492
2020-06-17Instead of performing three distinct allocations per created pipe,anton2-52/+57
2020-06-17Explicitly unmap DMA memory using pmap_kremove(9).kettenis1-1/+2
2020-06-17needs param.h, not types.hderaadt1-2/+2
2020-06-17Expose SMR list and pointer macros to userspace. This enables the usevisa1-3/+3
2020-06-17Remove the bus specific sc_ih (interrup handle) variable and use the commonclaudio3-20/+17
2020-06-17Let iwx(4) firmware decide which Tx rate to use.stsp2-7/+309
2020-06-17Attach secondary CPUs early. Since on most machine we need psci(4) tokettenis1-4/+21
2020-06-17if the chip did rss, use the hash from the chip as an mbuf flowid.dlg2-2/+8
2020-06-17make ph_flowid in mbufs 16bits by storing whether it's set in csum_flags.dlg12-54/+51
2020-06-17Remove some of the unnecessary complications in the calculation of thetb1-24/+21
2020-06-17enable multiple queues (and interrupts on multiple cpus) on vmx(4).dlg2-33/+53
2020-06-17add a dumb pci_intr_establish_cpu().dlg2-2/+16
2020-06-17pci_intr_establish_cpu() for establishing an interrupt no a specific cpu.dlg6-18/+37
2020-06-17wire intrmap into the builddlg1-1/+3
2020-06-17make intrmap_cpu return a struct cpu_info *, not a "cpuid number" thing.dlg2-10/+10
2020-06-17use atomic_set() in kref_init()jsg1-2/+2
2020-06-17kref_sub() interface was removed from linux and is unusedjsg1-8/+1
2020-06-17add pci_intr_msix_count(), to get the msi-x table size for a device.dlg2-3/+22
2020-06-17sparc64 should define __HAVE_PCI_MSIXdlg2-2/+48
2020-06-17use WRITE_ONCE and READ_ONCE for set and readjsg1-6/+6
2020-06-17add intrmap, an api that picks cpus for devices to attach interrupts to.dlg2-0/+385
2020-06-17Do not do logical negation of a bitshifted field.mortimer1-2/+2
2020-06-16make intr_barrier run sched_barrier on the cpu the interrupt pinned to.dlg1-3/+4
2020-06-16Remove old commented out line and fix indent.mortimer1-3/+2
2020-06-16Some simplifications.kettenis1-50/+90
2020-06-16Add missing dependeny.kettenis1-2/+2
2020-06-16remove some unused definesjsg1-14/+6
2020-06-16implement atomic_inc_not_zero() by way of atomic_add_unless()jsg1-11/+3
2020-06-16remove a dead storejsg1-2/+2
2020-06-16Release the rx node if we were unable to allocate a new rx buffer.jmatthew1-2/+2
2020-06-16configure toeplitz using the kernel stoeplitz key if needed.dlg2-3/+32
2020-06-16show the structure for the rss configuration.dlg1-1/+20
2020-06-16wire stoeplitz code into the tree.dlg2-2/+13
2020-06-16Add a symmetric toeplitz implementation, with integration for nics.dlg2-0/+344
2020-06-16Use separate event queues and interrupt vectors for admin/link eventsjmatthew1-137/+193
2020-06-15Check rdrand for success and try up to ten times, as recommended by Intel.naddy2-6/+38
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