1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
|
.\" $OpenBSD: cpu.4,v 1.8 2018/07/15 18:04:37 fcambus Exp $
.\"
.\" Copyright (c) 2004 Ted Unangst
.\" All rights reserved.
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\" notice, this list of conditions and the following disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\" notice, this list of conditions and the following disclaimer in the
.\" documentation and/or other materials provided with the distribution.
.\"
.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.\"
.Dd $Mdocdate: July 15 2018 $
.Dt CPU 4 amd64
.Os
.Sh NAME
.Nm cpu
.Nd Central Processing Unit
.Sh SYNOPSIS
.Cd "cpu0 at mainbus?"
.Cd "cpu* at mainbus?"
.Sh DESCRIPTION
Several processor models have additional features that extend their base
functionality, such as power and frequency control or thermal monitoring.
.Sh FREQUENCY CONTROL
The
.Xr sysctl 2
hw.cpuspeed returns the current operating frequency of the processor,
though on some processors this value may be only an approximation.
If possible, speed may be adjusted by altering hw.setperf from 0 to 100,
representing percentage of maximum speed.
There are several possible implementations for setperf, all transparent
to the user:
.Bl -tag -width tenletters
.It EST
Enhanced SpeedStep found on Intel and VIA processors,
offering frequency scaling with numerous positions.
.It PowerNow
Found on various AMD processors.
It currently only supports a limited set of models in the K8 families.
.El
.Sh INSTRUCTION SET EXTENSIONS
The presence of extended instruction sets can be determined by the
sysctl machdep.
.Bl -tag -width "tenletters"
.It xcrypt
Supports the VIA AES encryption instruction set.
If this is supported,
the libcrypto EVP AES functions automatically use this support.
.El
.Sh THERMAL MONITORING
The
.Xr sysctl 2
hw.sensors.cpu*.temp0 returns the current temperature reported by the
processor.
.Sh SEE ALSO
.Xr sysctl 8
.Sh BUGS
Due to the way in which thermal information is reported on Intel processors,
the temperature may be off by exactly +/-15 degrees C.
.Pp
For multiprocessor kernels with more than one CPU sensor,
processors report identical temperatures
since the temperature is taken from the processor running the sensors update.
|
