diff options
| author |   Ben Skeggs <bskeggs@redhat.com> | 2013-05-13 14:45:56 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2013-07-01 13:50:39 +1000 |
| commit | 8b637ae3a3d8142db23eed3100245c2a2390358b (patch) | |
| tree | f97daeadac517b90b03d882fda93d1b701308b1a /drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h | |
| parent | drm/nvc0/gr: update initial register/context values (diff) | |
| download | linux-dev-8b637ae3a3d8142db23eed3100245c2a2390358b.tar.xz linux-dev-8b637ae3a3d8142db23eed3100245c2a2390358b.zip | |
drm/nvc3/gr: update initial register/context values
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h')
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h | 34 |
1 files changed, 29 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h index 427ddf06316c..0db048131d30 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h +++ b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h @@ -40,8 +40,8 @@ uint32_t nvc0_grgpc_data[] = { 0x013800d4, 0x02640200, 0x000000c3, - 0x013400d4, - 0x02600200, + 0x01980138, + 0x030802b0, 0x000000c4, 0x013400d4, 0x02600200, @@ -56,10 +56,10 @@ uint32_t nvc0_grgpc_data[] = { 0x025c0200, 0x000000d9, 0x02000198, - 0x030c02b0, + 0x03640308, 0x000000d7, 0x02000198, - 0x030c02b0, + 0x03640308, 0x00000000, /* 0x00d4: nvc0_gpc_mmio_head */ 0x00000380, @@ -194,7 +194,31 @@ uint32_t nvc0_grgpc_data[] = { 0x00000698, 0x04000750, /* 0x02b0: nnvc0_tpc_mmio_tail */ -/* 0x02b0: nvd9_tpc_mmio_head */ +/* 0x02b0: nnvc3_tpc_mmio_head */ + 0x00000018, + 0x0000003c, + 0x00000048, + 0x00000064, + 0x00000088, + 0x14000200, + 0x0400021c, + 0x000002c4, + 0x14000300, + 0x000003d0, + 0x040003e0, + 0x08000400, + 0x00000420, + 0x000004b0, + 0x000004e8, + 0x000004f4, + 0x04000520, + 0x0c000604, + 0x4c000644, + 0x00000698, + 0x000006e0, + 0x28000730, +/* 0x0308: nnvc3_tpc_mmio_tail */ +/* 0x0308: nvd9_tpc_mmio_head */ 0x00000018, 0x0000003c, 0x00000048, |