aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h (follow)
AgeCommit message (Expand)AuthorFilesLines
2015-01-22drm/nouveau: remove symlinks, move core/ to nvkm/ (no code changes)Ben Skeggs1-530/+0
2014-03-26drm/gf100-/gf: fix a stupid typo, waiting on wrong signal for mmctxBen Skeggs1-1/+1
2014-03-26drm/nvc0-/graph: fix gpccs fuc stack setupBen Skeggs1-167/+167
2014-01-23drm/nvc0-/gr: bring in some macros to abstract falcon isa differencesBen Skeggs1-321/+383
2013-07-08drm/nvc0/gr: fix gpc firmware regressionMaarten Lankhorst1-20/+20
2013-07-05drm/nvf0-/gr: ctxsw scratch reg count got bumped to 16Ben Skeggs1-261/+261
2013-07-05drm/nvc0-/gr: generate cs register lists from grctx dataBen Skeggs1-247/+157
2013-07-05drm/nve0-/gr: some new gpc registers can have multiple copiesBen Skeggs1-20/+20
2013-07-01drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4Ben Skeggs1-2/+2
2013-07-01drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switchesBen Skeggs1-150/+30
2013-07-01drm/nvc8/gr: update initial register/context valuesBen Skeggs1-2/+2
2013-07-01drm/nvc4/gr: update initial register/context valuesBen Skeggs1-2/+2
2013-07-01drm/nvc1/gr: update initial register/context valuesBen Skeggs1-16/+16
2013-07-01drm/nvc3/gr: update initial register/context valuesBen Skeggs1-5/+29
2013-07-01drm/nvc0/gr: update initial register/context valuesBen Skeggs1-20/+67
2013-07-01drm/nvd9/gr: update initial register/context valuesBen Skeggs1-1/+1
2013-07-01drm/nouveau: pull in latest ucode builds from external treeBen Skeggs1-27/+30
2012-10-03drm/nvc0/gr: rebuild fuc with latest envyasBen Skeggs1-2/+68
2012-10-03drm/nouveau: quiet some static-related sparse noiseMarcin Slusarz1-2/+2
2012-10-03drm/nouveau: restructure source tree, split core from drm implementationBen Skeggs1-0/+538