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| author |   Bjorn Helgaas <bhelgaas@google.com> | 2019-11-28 08:54:51 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-11-28 08:54:51 -0600 |
| commit | 77471510559cdb60cd3dd4e93dca5bfe71b0f5c6 (patch) | |
| tree | 4595b4a92cf94fe77119c73fe1e5423d3dec6b19 /drivers/pci | |
| parent | Merge branch 'remotes/lorenzo/pci/tegra' (diff) | |
| parent | PCI: uniphier: Set mode register to host mode (diff) | |
| download | linux-dev-77471510559cdb60cd3dd4e93dca5bfe71b0f5c6.tar.xz linux-dev-77471510559cdb60cd3dd4e93dca5bfe71b0f5c6.zip | |
Merge branch 'remotes/lorenzo/pci/uniphier'
- Set uniphier to host (RC) mode always (Kunihiko Hayashi)
* remotes/lorenzo/pci/uniphier:
PCI: uniphier: Set mode register to host mode
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-uniphier.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-uniphier.c b/drivers/pci/controller/dwc/pcie-uniphier.c index 3f30ee4a00b3..8fd7badd59c2 100644 --- a/drivers/pci/controller/dwc/pcie-uniphier.c +++ b/drivers/pci/controller/dwc/pcie-uniphier.c @@ -33,6 +33,10 @@ #define PCL_PIPEMON 0x0044 #define PCL_PCLK_ALIVE BIT(15) +#define PCL_MODE 0x8000 +#define PCL_MODE_REGEN BIT(8) +#define PCL_MODE_REGVAL BIT(0) + #define PCL_APP_READY_CTRL 0x8008 #define PCL_APP_LTSSM_ENABLE BIT(0) @@ -85,6 +89,12 @@ static void uniphier_pcie_init_rc(struct uniphier_pcie_priv *priv) { u32 val; + /* set RC MODE */ + val = readl(priv->base + PCL_MODE); + val |= PCL_MODE_REGEN; + val &= ~PCL_MODE_REGVAL; + writel(val, priv->base + PCL_MODE); + /* use auxiliary power detection */ val = readl(priv->base + PCL_APP_PM0); val |= PCL_SYS_AUX_PWR_DET; |