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2022-08-15arm64: bcmbca: Merge ARCH_BCM4908 to ARCH_BCMBCAWilliam Zhang1-9/+1
Delete ARCH_BCM4908 platform Kconfig for BCM4908 SoC as it is replaced by ARCH_BCMBCA and move its selection to ARCH_BCMBCA. Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220803175455.47638-8-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: bcmbca: Make BCM4908 drivers depend on ARCH_BCMBCAWilliam Zhang10-18/+18
With Broadcom Broadband arch ARCH_BCMBCA supported in the kernel, this patch series migrate the ARCH_BCM4908 symbol to ARCH_BCMBCA. Hence replace ARCH_BCM4908 with ARCH_BCMBCA in subsystem Kconfig files. Signed-off-by: William Zhang <william.zhang@broadcom.com> Acked-by: Guenter Roeck <linux@roeck-us.net> (for watchdog) Acked-by: Bjorn Helgaas <bhelgaas@google.com> (for drivers/pci) Acked-by: Wolfram Sang <wsa@kernel.org> (for i2c) Acked-by: Philipp Zabel <p.zabel@pengutronix.de> (for reset) Link: https://lore.kernel.org/r/20220803175455.47638-7-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: dts: Add BCM4908 generic board dtsWilliam Zhang2-0/+31
Add generic bare bone bcm94908.dts file to support any 4908 based design. It supports cpu subsystem, memory and an uart console. This can be useful for board bring-up and cpu subsystem and memory related kernel test as well. Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220803175455.47638-6-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: dts: Move BCM4908 dts to bcmbca folderWilliam Zhang9-6/+4
As part of ARCH_BCM4908 to ARCH_BCMBCA migration, move the BCM4908 dts files to bcmbca folder and use CONFIG_ARCH_BCMBCA to build all the BCM4908 board dts. Delete bcm4908 folder and its makefile as well. Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220803175455.47638-5-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: dts: bcmbca: update BCM4908 board dts filesWilliam Zhang4-4/+4
Append "brcm,bcmbca" to compatible strings based on the new bcmbca binding rule for BCM4908 family based boards. Signed-off-by: William Zhang <william.zhang@broadcom.com> Acked-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220803175455.47638-4-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15dt-bindings: arm64: bcmbca: Update BCM4908 descriptionWilliam Zhang1-0/+4
Append "brcm,bcmbca" to BCM4908 chip family compatible strings to follow the convention of BCMBCA chip and help identifying chip family. Also add a bare bone generic 4908 board compatbile string to support any 4908 based board. This is useful for board bring-up test and kernel test with CPU and memory related change. Signed-off-by: William Zhang <william.zhang@broadcom.com> Acked-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220803175455.47638-3-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15dt-bindings: arm64: bcmbca: Merge BCM4908 into BCMBCAWilliam Zhang2-42/+21
BCM4908 is one of the Broadcom Broadband origin WLAN Router/Access Pointer SoCs. It was originally added by Rafał before Broadcom started to upstream the support for broadband SoCs. Now that Broadcom Broadband SoC is supported under arch ARCH_BCMBCA, this patch moves BCM4908 SoC device tree descriptions into BCMBCA binding. Signed-off-by: William Zhang <william.zhang@broadcom.com> Acked-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220803175455.47638-2-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15netfilter: nf_tables: check NFT_SET_CONCAT flag if field_count is specifiedPablo Neira Ayuso1-0/+5
Since f3a2181e16f1 ("netfilter: nf_tables: Support for sets with multiple ranged fields"), it possible to combine intervals and concatenations. Later on, ef516e8625dd ("netfilter: nf_tables: reintroduce the NFT_SET_CONCAT flag") provides the NFT_SET_CONCAT flag for userspace to report that the set stores a concatenation. Make sure NFT_SET_CONCAT is set on if field_count is specified for consistency. Otherwise, if NFT_SET_CONCAT is specified with no field_count, bail out with EINVAL. Fixes: ef516e8625dd ("netfilter: nf_tables: reintroduce the NFT_SET_CONCAT flag") Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2022-08-15soc: bcm: brcmstb: Document panic notifier action and remove useless headerGuilherme G. Piccoli1-2/+14
The panic notifier of this driver is very simple code-wise, just a memory write to a special position with some numeric code. But this is not clear from the semantic point-of-view, and there is no public documentation about that either. After discussing this in the mailing-lists [0] and having Florian explained it very well, document that in the code for the future generations asking the same questions. Also, while at it, remove a useless header. [0] https://lore.kernel.org/lkml/781cafb0-8d06-8b56-907a-5175c2da196a@gmail.com Cc: Brian Norris <computersforpeace@gmail.com> Cc: Doug Berger <opendmb@gmail.com> Cc: Justin Chen <justinpopo6@gmail.com> Cc: Lee Jones <lee.jones@linaro.org> Cc: Markus Mayer <mmayer@broadcom.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Guilherme G. Piccoli <gpiccoli@igalia.com> Link: https://lore.kernel.org/r/20220719195325.402745-5-gpiccoli@igalia.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15ARM: dts: BCM5301X: Add basic PCI controller propertiesRafał Miłecki1-0/+12
This fixes: arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dtb: pcie@12000: 'device_type' is a required property From schema: /lib/python3.9/site-packages/dtschema/schemas/pci/pci-bus.yaml arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dtb: pcie@12000: '#address-cells' is a required property From schema: /lib/python3.9/site-packages/dtschema/schemas/pci/pci-bus.yaml arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dtb: pcie@12000: '#size-cells' is a required property From schema: /lib/python3.9/site-packages/dtschema/schemas/pci/pci-bus.yaml arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dtb: pcie@13000: 'device_type' is a required property From schema: /lib/python3.9/site-packages/dtschema/schemas/pci/pci-bus.yaml arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dtb: pcie@13000: '#address-cells' is a required property From schema: /lib/python3.9/site-packages/dtschema/schemas/pci/pci-bus.yaml arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dtb: pcie@13000: '#size-cells' is a required property From schema: /lib/python3.9/site-packages/dtschema/schemas/pci/pci-bus.yaml arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dtb: pcie@14000: 'device_type' is a required property From schema: /lib/python3.9/site-packages/dtschema/schemas/pci/pci-bus.yaml arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dtb: pcie@14000: '#address-cells' is a required property From schema: /lib/python3.9/site-packages/dtschema/schemas/pci/pci-bus.yaml arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dtb: pcie@14000: '#size-cells' is a required property From schema: /lib/python3.9/site-packages/dtschema/schemas/pci/pci-bus.yaml What remains missing is "ranges" property. I currently don't know its correct value for Northstar SoC. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220721091509.27725-1-zajec5@gmail.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15ARM: dts: bcmbca: bcm6878: cosmetic changeWilliam Zhang1-0/+1
Add new line between dts node. Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220801194754.29492-2-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15ARM: dts: bcmbca: bcm6878: fix timer node cpu mask flagWilliam Zhang1-4/+4
The cpu mask flag value should match the number of cpu cores in the chip. Correct the value to two cpus for BCM6878 dual core SoC. Fixes: 6bcad714e173 ("ARM: dts: Add DTS files for bcmbca SoC BCM6878") Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220801194754.29492-1-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15ARM: dts: bcmbca: bcm6846: fix interrupt controller nodeWilliam Zhang1-3/+5
Add the missing gic registers and interrupts property to the gic node. Fixes: de1a99ac0b64 ("ARM: dts: Add DTS files for bcmbca SoC BCM6846") Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220801194647.29437-3-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15ARM: dts: bcmbca: bcm6846: clean up psci nodeWilliam Zhang1-2/+0
Remove unnecessary cpu_on and cpu_off properties from psci node as they are only needed for psci version prior to 0.2. Fixes: de1a99ac0b64 ("ARM: dts: Add DTS files for bcmbca SoC BCM6846") Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220801194647.29437-2-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15ARM: dts: bcmbca: bcm6846: fix timer node cpu mask flagWilliam Zhang1-4/+4
The cpu mask flag value should match the number of cpu cores in the chip. Correct the value to two cpus for BCM6846 dual core SoC. Fixes: de1a99ac0b64 ("ARM: dts: Add DTS files for bcmbca SoC BCM6846") Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220801194647.29437-1-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15ARM: dts: bcmbca: bcm63178: cosmetic changeWilliam Zhang1-0/+2
Add new line between dts node. Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220801194448.29363-4-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15ARM: dts: bcmbca: bcm63178: fix interrupt controller nodeWilliam Zhang1-3/+5
Add the missing gic registers and interrupts property to the gic node. Fixes: fc85b7e64acb ("ARM: dts: add dts files for bcmbca soc 63178") Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220801194448.29363-3-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15ARM: dts: bcmbca: bcm63178: clean up psci nodeWilliam Zhang1-2/+0
Remove unnecessary cpu_on and cpu_off properties from psci node as they are only needed for psci version prior to 0.2. Fixes: fc85b7e64acb ("ARM: dts: add dts files for bcmbca soc 63178") Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220801194448.29363-2-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15ARM: dts: bcmbca: bcm63178: fix timer node cpu mask flagWilliam Zhang1-4/+4
The cpu mask flag value should match the number of cpu cores in the chip. Correct the value to three cpus for BCM63178 triple core SoC. Fixes: fc85b7e64acb ("ARM: dts: add dts files for bcmbca soc 63178") Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220801194448.29363-1-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: dts: broadcom: bcm4908: add Asus GT-AC5300 LEDsRafał Miłecki1-0/+48
There are 5 software-controllable LEDs on PCB. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220718132100.13277-3-zajec5@gmail.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: dts: broadcom: bcm4908: add LEDs controller blockRafał Miłecki1-0/+8
BCM4908 includes LEDs controller that supports multiple brightness levels & hardware blinking. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220718132100.13277-2-zajec5@gmail.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15arm64: dts: broadcom: bcm4908: add remaining LED pinsRafał Miłecki1-0/+75
Include all 32 pins. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220718132100.13277-1-zajec5@gmail.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2022-08-15nios2: add force_successful_syscall_return()Al Viro2-0/+8
If we use the ancient SysV syscall ABI, we'd better have tell the kernel how to claim that a negative return value is a success. Use ->orig_r2 for that - it's inaccessible via ptrace, so it's a fair game for changes and it's normally[*] non-negative on return from syscall. Set to -1; syscall is not going to be restart-worthy by definition, so we won't interfere with that use either. [*] the only exception is rt_sigreturn(), where we skip the entire messing with r1/r2 anyway. Fixes: 82ed08dd1b0e ("nios2: Exception handling") Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-08-15nios2: restarts apply only to the first sigframe we build...Al Viro1-0/+1
Fixes: b53e906d255d ("nios2: Signal handling support") Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-08-15nios2: fix syscall restart checksAl Viro1-1/+1
sys_foo() returns -512 (aka -ERESTARTSYS) => do_signal() sees 512 in r2 and 1 in r1. sys_foo() returns 512 => do_signal() sees 512 in r2 and 0 in r1. The former is restart-worthy; the latter obviously isn't. Fixes: b53e906d255d ("nios2: Signal handling support") Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-08-15nios2: traced syscall does need to check the syscall numberAl Viro1-3/+8
all checks done before letting the tracer modify the register state are worthless... Fixes: 82ed08dd1b0e ("nios2: Exception handling") Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-08-15nios2: don't leave NULLs in sys_call_table[]Al Viro2-1/+1
fill the gaps in there with sys_ni_syscall, as everyone does... Fixes: 82ed08dd1b0e ("nios2: Exception handling") Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-08-15nios2: page fault et.al. are *not* restartable syscalls...Al Viro2-4/+3
make sure that ->orig_r2 is negative for everything except the syscalls. Fixes: 82ed08dd1b0e ("nios2: Exception handling") Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-08-15ASoC: soc-utils: Improve kerneldoc for snd_soc_tdm_params_to_bclk()Richard Fitzgerald1-11/+12
The statement that snd_soc_tdm_params_to_bclk() is equivalent to snd_soc_params_to_bclk() if tdm_width==tdm_slots==0 is not accurate, it is only true is slot_multiple is also <2. However, the description of special-case behaviour in terms of pairs of tdm_width and tdm_slot values is not particularly helpful so we might as well take the opportunity to rework the description to say the same thing in a simpler way. The behaviour of a pair of values is obvious from a description of each argument. At the same time make a few edits to clarify the rest of the description. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://lore.kernel.org/r/20220815113346.3805075-1-rf@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-08-15DT binding for sample format conversionMark Brown5-12/+89
Merge series from Sameer Pujar <spujar@nvidia.com>: DT binding properties are available to fixup rate and channel parameters of a DAI. This series extends this to sample format conversion as well. With this now DAI PCM parameters (channels, sample rate and sample format) can be fixed up as necessary in an audio path.
2022-08-15ASoC: Replace sprintf() with sysfs_emit()Mark Brown9-28/+26
Merge series from Takashi Iwai <tiwai@suse.de>: This is a patch set for rather simple conversions from the plain sprintf() & co to the new helpers, sysfs_emit() and sysfs_emit_at(). No functional changes are expected.
2022-08-15tools: hv: Remove an extraneous "the"Jason Wang1-1/+1
There are two "the" in the text. Remove one. Signed-off-by: Jason Wang <wangborong@cdjrlc.com> Link: https://lore.kernel.org/r/20220811133433.10175-1-wangborong@cdjrlc.com Signed-off-by: Wei Liu <wei.liu@kernel.org>
2022-08-15drm/hyperv: Fix an error handling path in hyperv_vmbus_probe()Christophe JAILLET1-3/+4
hyperv_setup_vram() calls vmbus_allocate_mmio(). This must be undone in the error handling path of the probe, as already done in the remove function. Fixes: a0ab5abced55 ("drm/hyperv : Removing the restruction of VRAM allocation with PCI bar size") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Michael Kelley <mikelley@microsoft.com> Link: https://lore.kernel.org/r/7dfa372af3e35fbb1d6f157183dfef2e4512d3be.1659297696.git.christophe.jaillet@wanadoo.fr Signed-off-by: Wei Liu <wei.liu@kernel.org>
2022-08-15netfilter: nf_tables: disallow NFT_SET_ELEM_CATCHALL and NFT_SET_ELEM_INTERVAL_ENDPablo Neira Ayuso1-0/+3
These flags are mutually exclusive, report EINVAL in this case. Fixes: aaa31047a6d2 ("netfilter: nftables: add catch-all set element support") Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2022-08-15netfilter: nf_tables: NFTA_SET_ELEM_KEY_END requires concat and interval flagsPablo Neira Ayuso1-0/+24
If the NFT_SET_CONCAT|NFT_SET_INTERVAL flags are set on, then the netlink attribute NFTA_SET_ELEM_KEY_END must be specified. Otherwise, NFTA_SET_ELEM_KEY_END should not be present. For catch-all element, NFTA_SET_ELEM_KEY_END should not be present. The NFT_SET_ELEM_INTERVAL_END is never used with this set flags combination. Fixes: 7b225d0b5c6d ("netfilter: nf_tables: add NFTA_SET_ELEM_KEY_END attribute") Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2022-08-15spi: npcm-pspi: add Arbel NPCM8XX supportMark Brown2-1/+3
Merge series from Tomer Maimon <tmaimon77@gmail.com>: This patch set adds Arbel NPCM8XX Peripheral SPI (PSPI) support to PSPI NPCM driver.
2022-08-15Add support for Microchip QSPI controllerMark Brown5-4/+622
Merge series from Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>: This patch enables the Microchip's FPGA QSPI and Polarfire SoC QSPI controller support. Tested spi-nand (W25N01GV) and spi-nor (MT25QL256A) on Microchip's ICICLE kit. tested using both FPGA QSPI and Polarfie SoC QSPI.
2022-08-15bpf: Clear up confusion in bpf_skb_adjust_room()'s documentationQuentin Monnet2-4/+8
Adding or removing room space _below_ layers 2 or 3, as the description mentions, is ambiguous. This was written with a mental image of the packet with layer 2 at the top, layer 3 under it, and so on. But it has led users to believe that it was on lower layers (before the beginning of the L2 and L3 headers respectively). Let's make it more explicit, and specify between which layers the room space is adjusted. Reported-by: Rumen Telbizov <rumen.telbizov@menlosecurity.com> Signed-off-by: Quentin Monnet <quentin@isovalent.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20220812153727.224500-3-quentin@isovalent.com
2022-08-15bpftool: Fix a typo in a commentQuentin Monnet1-1/+1
This is the wrong library name: libcap, not libpcap. Signed-off-by: Quentin Monnet <quentin@isovalent.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20220812153727.224500-1-quentin@isovalent.com
2022-08-15xsk: Fix corrupted packets for XDP_SHARED_UMEMMagnus Karlsson1-6/+10
Fix an issue in XDP_SHARED_UMEM mode together with aligned mode where packets are corrupted for the second and any further sockets bound to the same umem. In other words, this does not affect the first socket bound to the umem. The culprit for this bug is that the initialization of the DMA addresses for the pre-populated xsk buffer pool entries was not performed for any socket but the first one bound to the umem. Only the linear array of DMA addresses was populated. Fix this by populating the DMA addresses in the xsk buffer pool for every socket bound to the same umem. Fixes: 94033cd8e73b8 ("xsk: Optimize for aligned case") Reported-by: Alasdair McWilliam <alasdair.mcwilliam@outlook.com> Reported-by: Intrusion Shield Team <dnevil@intrusion.com> Signed-off-by: Magnus Karlsson <magnus.karlsson@intel.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Tested-by: Alasdair McWilliam <alasdair.mcwilliam@outlook.com> Acked-by: Maciej Fijalkowski <maciej.fijalkowski@intel.com> Link: https://lore.kernel.org/xdp-newbies/6205E10C-292E-4995-9D10-409649354226@outlook.com/ Link: https://lore.kernel.org/bpf/20220812113259.531-1-magnus.karlsson@gmail.com
2022-08-15s390/ap: fix crash on older machines based on QCI info missingHarald Freudenberger2-0/+7
On older z series machines (z12 and older) there is no QCI info available. The AP code took care of this and the AP bus scan then switched to simple probing via TAPQ. With commit 283915850a44 ("s390/ap: notify drivers on config changed and scan complete callbacks") some code was introduced which silently assumed that the QCI info is always available. However, with KVM simulating an older machine (z12) the result was a kernel crash. Funnily the same crash does not happen on LPAR - maybe because NULL is a valid pointer and reading some data from address 0 also works fine. This fix now improves the code to be aware that the QCI instruction may not be available on older machines and thus the two pointers to QCI info structs may simple be NULL. However, on a machine not providing the QCI info the two callbacks to the zcrypt device drivers on_config_changed() and on_scan_complete() provide parameters which are pointers to a QCI info struct. These both callbacks are NOT served if there is no QCI info available. The only consumer of these callbacks is the vfio device driver. This driver only supports CEX4 and higher. All physical machines which are able to provide CEX4 cards have QCI support available. So there is no sense in for example fill the QCI info struct by hand with looping over cards and queues and TAPQ each APQN. Signed-off-by: Harald Freudenberger <freude@linux.ibm.com> Signed-off-by: Tony Krowiak <akrowiak@linux.ibm.com> Cc: stable@vger.kernel.org Fixes: 283915850a44 ("s390/ap: notify drivers on config changed and scan complete callbacks") Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2022-08-15s390/hypfs: avoid error message under KVMJuergen Gross2-2/+2
When booting under KVM the following error messages are issued: hypfs.7f5705: The hardware system does not support hypfs hypfs.7a79f0: Initialization of hypfs failed with rc=-61 Demote the severity of first message from "error" to "info" and issue the second message only in other error cases. Signed-off-by: Juergen Gross <jgross@suse.com> Acked-by: Heiko Carstens <hca@linux.ibm.com> Acked-by: Christian Borntraeger <borntraeger@linux.ibm.com> Link: https://lore.kernel.org/r/20220620094534.18967-1-jgross@suse.com [arch/s390/hypfs/hypfs_diag.c changed description] Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2022-08-15ALSA: hda/realtek: Add quirks for ASUS Zenbooks using CS35L41Stefan Binding1-0/+2
These Asus Zenbook laptop use Realtek HDA codec combined with 2xCS35L41 Amplifiers using SPI. Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com> Link: https://lore.kernel.org/r/20220815141953.25197-1-sbinding@opensource.cirrus.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
2022-08-15ASoC: cs42l42: Only report button state if there was a button interruptRichard Fitzgerald1-6/+7
Only report a button state change if the interrupt status shows that there was a button event. Previously the code would always drop into the button reporting at the end of interrupt handling if the jack was present. If neither of the button report interrupts were pending it would report all buttons released. This could then lead to a button being reported as released while it is still pressed. Fixes: c5b8ee0879bc ("ASoC: cs42l42: Report jack and button detection") Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://lore.kernel.org/r/20220815123138.3810249-1-rf@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-08-15mmc: meson-gx: Fix an error handling path in meson_mmc_probe()Christophe JAILLET1-2/+4
The commit in Fixes has introduced a new error handling which should goto the existing error handling path. Otherwise some resources leak. Fixes: 19c6beaa064c ("mmc: meson-gx: add device reset") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/be4b863bacf323521ba3a02efdc4fca9cdedd1a6.1659855351.git.christophe.jaillet@wanadoo.fr Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-08-15mmc: mtk-sd: Clear interrupts when cqe off/disableWenbin Mei1-0/+6
Currently we don't clear MSDC interrupts when cqe off/disable, which led to the data complete interrupt will be reserved for the next command. If the next command with data transfer after cqe off/disable, we process the CMD ready interrupt and trigger DMA start for data, but the data complete interrupt is already exists, then SW assume that the data transfer is complete, SW will trigger DMA stop, but the data may not be transmitted yet or is transmitting, so we may encounter the following error: mtk-msdc 11230000.mmc: CMD bus busy detected. Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com> Fixes: 88bd652b3c74 ("mmc: mediatek: command queue support") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220728080048.21336-1-wenbin.mei@mediatek.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-08-15dt-bindings: gpio: fairchild,74hc595: use spi-peripheral-props.yamlKrzysztof Kozlowski1-3/+4
Instead of listing directly properties typical for SPI peripherals, reference the spi-peripheral-props.yaml schema. This allows using all properties typical for SPI-connected devices, even these which device bindings author did not tried yet. Remove the spi-* properties which now come via spi-peripheral-props.yaml schema, except for the cases when device schema adds some constraints like maximum frequency. While changing additionalProperties->unevaluatedProperties, put it in typical place, just before example DTS. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2022-08-15mmc: pxamci: Fix another error handling path in pxamci_probe()Christophe JAILLET1-1/+1
The commit in Fixes: has introduced an new error handling without branching to the existing error handling path. Update it now and release some resources if pxamci_init_ocr() fails. Fixes: 61951fd6cb49 ("mmc: pxamci: let mmc core handle regulators") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/07a2dcebf8ede69b484103de8f9df043f158cffd.1658862932.git.christophe.jaillet@wanadoo.fr Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-08-15arm64: dts: juno: Add missing MHU secure-irqJassi Brar1-1/+2
The MHU secure interrupt exists physically but is missing in the DT node. Specify the interrupt in DT node to fix a warning on Arm Juno board: mhu@2b1f0000: interrupts: [[0, 36, 4], [0, 35, 4]] is too short Link: https://lore.kernel.org/r/20220801141005.599258-1-jassisinghbrar@gmail.com Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-08-15arm64: dts: arm: juno: Remove legacy Coresight 'slave-mode' propertyRob Herring1-2/+0
The 'slave-mode' property is not valid under 'in-ports' as it was the legacy way to find input ports. Warnings are generated from the Coresight schema: arch/arm64/boot/dts/arm/juno-r1.dtb: funnel@20150000: in-ports:port@0:endpoint: Unevaluated properties are not allowed ('slave-mode' was unexpected) From schema: Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml Link: https://lore.kernel.org/r/20220721212952.1984382-1-robh@kernel.org Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>