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2022-07-08arm64: tegra: Fix SDMMC1 CD on P2888Tamás Szűcs1-1/+1
Hook SDMMC1 CD up with CVM GPIO02 (SOC_GPIO11) used for card detection on J4 (uSD socket) on the carrier. Fixes: ef633bfc21e9 ("arm64: tegra: Enable card detect for SD card on P2888") Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-25Revert "arm64: dts: tegra: Fix boolean properties with values"Arnd Bergmann1-3/+3
This reverts commit 1a67653de0dd, which caused a boot regression. The behavior of the "drive-push-pull" in the kernel does not match what the binding document describes. Revert Rob's patch to make the DT match the kernel again, rather than the binding. Link: https://lore.kernel.org/lkml/YlVAy95eF%2F9b1nmu@orome/ Reported-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-07arm64: dts: tegra: Fix boolean properties with valuesRob Herring1-3/+3
Boolean properties in DT are present or not present and don't take a value. A property such as 'foo = <0>;' evaluated to true. IOW, the value doesn't matter. It may have been intended that 0 values are false, but there is no change in behavior with this patch. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/Yk3nShkFzNJaI3/Z@robh.at.kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-16arm64: tegra: Rename Ethernet PHY nodesThierry Reding1-1/+1
Name the Ethernet PHY device tree nodes as expected by the DT schema. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Rename top-level regulatorsThierry Reding1-5/+5
Regulators defined at the top level in device tree are no longer part of a simple bus and therefore don't have a reg property. Nodes without a reg property shouldn't have a unit-address either, so drop the unit address from the node names. To ensure nodes aren't duplicated (in which case they would end up merged in the final DTB), append the name of the regulator to the node name. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-11arm64: tegra194: p2888: Correct interrupt trigger type of temperature sensorDmitry Osipenko1-1/+1
The LM90 temperature sensor should use edge-triggered interrupt because LM90 hardware doesn't deassert interrupt line until temperature is back to normal state, which results in interrupt storm. Correct the interrupt trigger type. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-01-27arm64: tegra: Enable Jetson-Xavier J512 USB hostJC Kuo1-0/+8
This commit enables USB host mode at J512 type-C port of Jetson-Xavier. Signed-off-by: JC Kuo <jckuo@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17arm64: tegra: Add label properties for EEPROMsJon Hunter1-0/+1
Populate the label property for the AT24 EEPROMs on the various Jetson platforms. Note that the name 'module' is used to identify the EEPROM on the processor module board and the name 'system' is used to identify the EEPROM on the main base board (which is sometimes referred to as the carrier board). Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-08-27arm64: tegra: Add ID EEPROMs on Jetson AGX XavierThierry Reding1-0/+15
The P2888 processor module contains an EEPROM that provides means of identifying the module. The P2822 carrier board contains the same EEPROM with information identifying the carrier board. Both of them ar accessed via the GEN_I2C1 bus. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Sort aliases alphabeticallyThierry Reding1-3/+3
Most device tree files already do this, so update the remaining ones for consistency. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Rename cbb@0 to bus@0 on Tegra194Thierry Reding1-11/+11
The control backbone is a simple-bus and hence its device tree node should be named "bus@<unit-address>" according to the bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-13arm64: tegra: Remove simple regulators busThierry Reding1-56/+40
The standard way to do this is to list out the regulators at the top- level. Adopt the standard way to fix validation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23arm64: tegra: Rename sdhci nodes to mmcThierry Reding1-4/+4
The new json-schema based validation tools require SD/MMC controller nodes to be named mmc. Rename all references to them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23arm64: tegra: Add missing #phy-cells property on Jetson AGX XavierThierry Reding1-0/+1
PHYs need to have a #phy-cells property that defines how many cells are required in their specifier. The standard Ethernet PHY doesn't require a specifier, so set its #phy-cells to 0. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-05-20arm64: tegra: Allow the PMIC RTC to wakeup Jetson XavierJon Hunter1-1/+2
The PMIC RTC is currently unable to wakeup Tegra194 on the Jetson Xavier platform because the interrupt from the PMIC is not usin the PMC as the interrupt parent but the GIC directly. Update the PMIC interrupt to use the PMC as the interrupt parent so that the PMIC RTC alarms can wakeup the device. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-05-20arm64: tegra: Fix ethernet phy-mode for Jetson XavierJon Hunter1-1/+1
The 'phy-mode' property is currently defined as 'rgmii' for Jetson Xavier. This indicates that the RGMII RX and TX delays are set by the MAC and the internal delays set by the PHY are not used. If the Marvell PHY driver is enabled, such that it is used and not the generic PHY, ethernet failures are seen (DHCP is failing to obtain an IP address) and this is caused because the Marvell PHY driver is disabling the internal RX and TX delays. For Jetson Xavier the internal PHY RX and TX delay should be used and so fix this by setting the 'phy-mode' to 'rgmii-id' and not 'rgmii'. Fixes: f89b58ce71a9 ("arm64: tegra: Add ethernet controller on Tegra194") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12arm64: tegra: Enable XUSB host in P2972-0000 boardJC Kuo1-1/+35
This commit enables XUSB host and pad controller in Tegra194 P2972-0000 board. Signed-off-by: JC Kuo <jckuo@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-09arm64: tegra: Add the memory subsystem on Tegra194Thierry Reding1-0/+4
The memory subsystem on Tegra194 encompasses both the memory and external memory controllers. The EMC is represented as a subnode of the MC and a ranges property is used to describe the register ranges. A dma-ranges property is also added to describe that all memory clients can address up to 39 bits using the memory controller client interface (MCCIF), unless otherwise limited by the DMA engines of the hardware. A memory client can technically use 40 bits of addresses, but the memory controller on Tegra194 uses bit 39 to determine the XBAR format used to access memory. Use of this bit needs to be explicitly controlled by the operating system drivers for devices that can use this on-the-fly format conversion. Using the dma-ranges property prevents the operating system from using the bit implicitly, for example in I/O virtual address mappings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: p2888: Rename regulators for consistencyThierry Reding1-6/+6
Some of the PMIC regulators had names that don't match the schematics. Rename them so that it is easier to cross-reference with the hardware documentation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Add ethernet alias on Jetson AGX XavierThierry Reding1-0/+1
The Tegra194 EQOS controller is used as primary Ethernet interface. Set the ethernet0 alias to reflect that. Generic bootloader code can use this to find the primary Ethernet device and set the MAC address, for example. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Add unit-address for CBB on Tegra194Thierry Reding1-10/+10
The control back-bone (CBB) starts at physical address 0, so give it a unit-address to comply with standard naming practices checked for by the device tree compiler. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Fix 'active-low' warning for Jetson Xavier regulatorJon Hunter1-2/+1
Commit 4fdbfd60a3a2 ("arm64: tegra: Add PCIe slot supply information in p2972-0000 platform") added regulators for the PCIe slot on the Jetson Xavier platform. One of these regulators has an active-low enable and this commit incorrectly added an active-low specifier for the GPIO which causes the following warning to occur on boot ... WARNING KERN regulator@3 GPIO handle specifies active low - ignored The fixed-regulator binding does not use the active-low flag from the gpio specifier and purely relies of the presence of the 'enable-active-high' property to determine if it is active high or low (if this property is omitted). Fix this warning by setting the GPIO to active-high in the GPIO specifier. Finally, remove the 'enable-active-low' as this is not a valid property. Fixes: 4fdbfd60a3a2 ("arm64: tegra: Add PCIe slot supply information in p2972-0000 platform") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-09-20arm64: tegra: Add PCIe slot supply information in p2972-0000 platformVidya Sagar1-0/+24
Add 3.3V and 12V supplies regulators information of x16 PCIe slot in p2972-0000 platform which is owned by C5 controller and also enable C5 controller. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-06-21arm64: tegra: Enable PCIe slots in P2972-0000 boardVidya Sagar1-1/+1
Enable PCIe controller nodes to enable respective PCIe slots on P2972-0000 board. Following is the ownership of slots by different PCIe controllers. Controller-0 : M.2 Key-M slot Controller-1 : On-board Marvell eSATA controller Controller-3 : M.2 Key-E slot Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-05-22arm64: tegra: Clarify that P2888 is the Jetson AGX XavierThierry Reding1-1/+1
P2888 is the internal part number for the Jetson AGX Xavier module. Clarify that using the DT model property. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-12arm64: tegra: Add supply for temperature sensor on P2888Jon Hunter1-0/+1
The VCC supply property is not populated for the temperature sensor on the P2888 board and so the following warning is observed on boot ... lm90 0-004c: 0-004c supply vcc not found, using dummy regulator On the P2888 board, the VCC supply for the temperature sensor is connected to the 'vdd_1v8ls' rail. Add the 'vcc-supply' property for the temperature sensor to prevent this warning message from occurring. Fixes: 8b457812f54b ('arm64: tegra: Add temperature sensor on P2888') Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-02-07arm64: tegra: Mark TCU as primary serial port on Tegra194 P2888Mikko Perttunen1-1/+1
The Tegra Combined UART is the proper primary serial port on P2888, so use it. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-12-03arm64: tegra: Add temperature sensor on P2888Thierry Reding1-0/+11
The P2888 processor module contains a TI TMP451 temperature sensor with two channels. These are used to measure the temperatures at different locations on the module. Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-12-03arm64: tegra: p2888: Enable on-die RTCThierry Reding1-0/+4
The on-die RTC isn't hooked up to a backup battery, so it isn't useful to track time across reboots, but as long as power remains enabled, it keeps track of time accurately and can be used to wake the system from sleep, for example. Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-12-03arm64: tegra: Enable HDMI on P2972-0000Thierry Reding1-2/+13
Add the 5V HDMI regulator and hook up the VDD_1V0 and VDD_1V8HS supplies from the PMIC to the display block. Also enable the display hub which is responsible for instantiating the display controllers. Finally, enable the third SOR that drives the TMDS signals to the HDMI connector. Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-02arm64: tegra: Add ethernet controller on Tegra194Mikko Perttunen1-0/+20
The Tegra194 contains the same ethernet controller as the Tegra186. Add the device tree node for it, and correspondingly the PHY node on the board device tree. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-02arm64: tegra: Enable card detect for SD card on P2888Mikko Perttunen1-2/+0
Now that we have a GPIO controller, enable the card detect GPIO for the SD card slot. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08arm64: tegra: Add device tree for the Tegra194 P2972-0000 boardMikko Perttunen1-0/+248
Add device tree files for the Tegra194 P2972-0000 development board. The board consists of the P2888 compute module and the P2822 baseboard. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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