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2022-09-15arm64: dts: qcom: ipq8074: fix PCIe PHY serdes sizeJohan Hovold1-2/+2
The size of the PCIe PHY serdes register region is 0x1c4 and the corresponding 'reg' property should specifically not include the adjacent regions that are defined in the child node (e.g. tx and rx). Fixes: 33057e1672fe ("ARM: dts: ipq8074: Add pcie nodes") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220915143431.19842-1-johan+linaro@kernel.org
2022-09-13arm64: dts: qcom: align SDHCI reg-names with DT schemaKrzysztof Kozlowski1-1/+1
DT schema requires SDHCI reg names to be hc/core without "_mem" suffix, just like TXT bindings were expecting before the conversion. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220712144245.17417-4-krzysztof.kozlowski@linaro.org
2022-07-16arm64: dts: qcom: ipq8074: add interrupt-parent to DTSIRobert Marko1-0/+1
Add interrupt-parent to the SoC DTSI to avoid duplicating it in each board DTS file. Remove interrupt-parent from existing board DTS files. Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220708133846.599735-2-robimarko@gmail.com
2022-07-16arm64: dts: qcom: ipq8074: add #size/address-cells to DTSIRobert Marko1-0/+3
Add #size-cells and #address-cells to the SoC DTSI to avoid duplicating the same properties in board DTS files. Remove the mentioned properties from current board DTS files. Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220708133846.599735-1-robimarko@gmail.com
2022-07-16arm64: dts: qcom: ipq8074: add APCS nodeRobert Marko1-0/+8
APCS now has support for providing the APSS clocks as the child device for IPQ8074. So, add the required DT node for it as it will later be used as the CPU clocksource. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> [bjorn: Sorted node based on address] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220707173733.404947-4-robimarko@gmail.com
2022-07-06arm64: dts: qcom: ipq8074: drop USB PHY clock indexJohan Hovold1-2/+2
The QMP USB PHY provides a single clock so drop the redundant clock index. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220705114032.22787-5-johan+linaro@kernel.org
2022-07-06arm64: dts: qcom: ipq8074: add reset to SDHCIRobert Marko1-0/+1
Add reset to SDHCI controller so it can be reset to avoid timeout issues after software reset due to bootloader set configuration. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220704143554.1180927-2-robimarko@gmail.com
2022-07-06arm64: dts: qcom: ipq8074: move ARMv8 timer out of SoC nodeRobert Marko1-8/+8
The ARM timer is usually considered not part of SoC node, just like other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning: arch/arm64/boot/dts/qcom/ipq8072-ax9000.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'} From schema: dtschema/schemas/simple-bus.yaml Signed-off-by: Robert Marko <robimarko@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [bjorn: Moved node after "soc" for alphabetical ordering] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220704113318.623102-1-robimarko@gmail.com
2022-07-02arm64: dts: qcom: ipq8074: fix NAND node nameRobert Marko1-1/+1
Per schema it should be nand-controller@79b0000 instead of nand@79b0000. Fix it to match nand-controller.yaml requirements. Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220621120642.518575-1-robimarko@gmail.com
2022-07-02arm64: dts: qcom: ipq8074: add USB power domainsRobert Marko1-0/+5
Add USB power domains provided by GCC GDSCs. Add the required #power-domain-cells to the GCC as well. Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220515210048.483898-11-robimarko@gmail.com
2022-07-02arm64: dts: qcom: Fix ordering of 'clocks' & 'clock-names' for sdhci nodesBhupesh Sharma1-4/+4
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports a number of issues with ordering of 'clocks' & 'clock-names' for sdhci nodes: arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:0: 'iface' was expected arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:1: 'core' was expected arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:2: 'xo' was expected Fix the same by updating the offending 'dts' files. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-5-bhupesh.sharma@linaro.org
2022-07-02arm64: dts: qcom: Fix sdhci node names - use 'mmc@'Bhupesh Sharma1-1/+1
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports issues with inconsistent 'sdhci@' convention used for specifying the sdhci nodes. The generic mmc bindings expect 'mmc@' format instead. Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> [bjorn: Moved non-arm64 changes to separate commit] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-2-bhupesh.sharma@linaro.org
2022-07-02arm64: dts: qcom: adjust whitespace around '='Krzysztof Kozlowski1-2/+2
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220526204248.832139-1-krzysztof.kozlowski@linaro.org
2022-06-03Merge tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usbLinus Torvalds1-8/+8
Pull USB / Thunderbolt updates from Greg KH: "Here is the "big" set of USB and Thunderbolt driver changes for 5.18-rc1. For the most part it's been a quiet development cycle for the USB core, but there are the usual "hot spots" of development activity. Included in here are: - Thunderbolt driver updates: - fixes for devices without displayport adapters - lane bonding support and improvements - other minor changes based on device testing - dwc3 gadget driver changes. It seems this driver will never be finished given that the IP core is showing up in zillions of new devices and each implementation decides to do something different with it... - uvc gadget driver updates as more devices start to use and rely on this hardware as well - usb_maxpacket() api changes to remove an unneeded and unused parameter. - usb-serial driver device id updates and small cleanups - typec cleanups and fixes based on device testing - device tree updates for usb properties - lots of other small fixes and driver updates. All of these have been in linux-next for weeks with no reported problems" * tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (154 commits) USB: new quirk for Dell Gen 2 devices usb: dwc3: core: Add error log when core soft reset failed usb: dwc3: gadget: Move null pinter check to proper place usb: hub: Simplify error and success path in port_over_current_notify usb: cdns3: allocate TX FIFO size according to composite EP number usb: dwc3: Fix ep0 handling when getting reset while doing control transfer usb: Probe EHCI, OHCI controllers asynchronously usb: isp1760: Fix out-of-bounds array access xhci: Don't defer primary roothub registration if there is only one roothub USB: serial: option: add Quectel BG95 modem USB: serial: pl2303: fix type detection for odd device xhci: Allow host runtime PM as default for Intel Alder Lake N xHCI xhci: Remove quirk for over 10 year old evaluation hardware xhci: prevent U2 link power state if Intel tier policy prevented U1 xhci: use generic command timer for stop endpoint commands. usb: host: xhci-plat: omit shared hcd if either root hub has no ports usb: host: xhci-plat: prepare operation w/o shared hcd usb: host: xhci-plat: create shared hcd after having added main hcd xhci: prepare for operation w/o shared hcd xhci: factor out parts of xhci_gen_setup() ...
2022-05-05arm64: dts: qcom: align DWC3 USB clocks with DT schemaKrzysztof Kozlowski1-4/+4
Align order of clocks and their names with Qualcomm DWC3 USB DT schema. No functional impact expected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-13-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-05arm64: dts: qcom: ipq8074: add dedicated qcom,ipq8074-dwc3 compatibleKrzysztof Kozlowski1-2/+2
Add dedicated compatible for DWC3 USB node name to allow more accurate DT schema matching. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-8-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-05arm64: dts: qcom: correct DWC3 node names and unit addressesKrzysztof Kozlowski1-2/+2
Align DWC3 USB node names with DT schema ("usb" is expected) and correct the unit addresses to match the "reg" property. This also implies overriding nodes by label, instead of full path. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-7-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-04-12arm64: dts: qcom: ipq8074: fix the sleep clock frequencyKathiravan T1-1/+1
Sleep clock frequency should be 32768Hz. Lets fix it. Cc: stable@vger.kernel.org Fixes: 41dac73e243d ("arm64: dts: Add ipq8074 SoC and HK01 board support") Link: https://lore.kernel.org/all/e2a447f8-6024-0369-f698-2027b6edcf9e@codeaurora.org/ Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1644581655-11568-1-git-send-email-quic_kathirav@quicinc.com
2022-04-12arm64: dts: qcom: align clocks in I2C/SPI with DT schemaKrzysztof Kozlowski1-12/+12
The DT schema expects clocks core-iface order. No functional change. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220405063451.12011-3-krzysztof.kozlowski@linaro.org
2022-04-12arm64: dts: qcom: align dmas in I2C/SPI/UART with DT schemaKrzysztof Kozlowski1-8/+8
The DT schema expects dma channels in tx-rx order. No functional change. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220405063451.12011-2-krzysztof.kozlowski@linaro.org
2022-02-10arm64: dts: qcom: ipq8074: drop the clock-frequency propertyKathiravan T1-1/+0
Drop the clock-frequency property from the MMIO timer node, since it is already configured by the bootloader. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1643819709-5410-2-git-send-email-quic_kathirav@quicinc.com
2022-02-10arm64: dts: qcom: ipq8074: enable the GICv2m supportKathiravan T1-0/+9
GIC used in the IPQ8074 SoCs has one instance of the GICv2m extension, which supports upto 32 MSI interrupts. Lets add support for the same. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1644334525-11577-2-git-send-email-quic_kathirav@quicinc.com
2022-01-31arm64: dts: qcom: ipq8074: add the reserved-memory nodeKathiravan T1-0/+5
On IPQ8074, 4MB of memory is needed for TZ. So mark that region as reserved. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> [bjorn: Squash with existing reserved-memory node] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1641560078-860-1-git-send-email-quic_kathirav@quicinc.com
2022-01-31arm64: dts: qcom: ipq8074: add SMEM supportRobert Marko1-0/+20
IPQ8074 uses SMEM like other modern QCA SoC-s, so since its already supported by the kernel add the required DT nodes. Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220106212512.1970828-1-robimarko@gmail.com
2021-11-17arm64: dts: qcom: ipq8074: add MDIO busRobert Marko1-0/+12
IPQ8074 uses an IPQ4019 compatible MDIO controller that is already supported in the kernel, so add the DT node in order to use it. Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007115846.26255-1-robimarko@gmail.com
2021-10-24arm64: dts: qcom: Fix IPQ8074 PCIe PHY nodesShawn Guo1-10/+36
IPQ8074 PCIe PHY nodes are broken in the many ways: - '#address-cells', '#size-cells' and 'ranges' are missing. - Child phy/lane node is missing, and the child properties like '#phy-cells' and 'clocks' are mistakenly put into parent node. - The clocks properties for parent node are missing. Fix them to get the nodes comply with the bindings schema. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-9-shawn.guo@linaro.org
2021-10-24arm64: dts: qcom: Correct QMP PHY child node nameShawn Guo1-2/+2
Many child nodes of QMP PHY are named without following bindings schema and causing dtbs_check warnings like below. phy@1c06000: 'lane@1c06800' does not match any of the regexes: '^phy@[0-9a-f]+$' arch/arm64/boot/dts/qcom/msm8998-asus-novago-tp370ql.dt.yaml arch/arm64/boot/dts/qcom/msm8998-hp-envy-x2.dt.yaml arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dt.yaml arch/arm64/boot/dts/qcom/msm8998-mtp.dt.yaml arch/arm64/boot/dts/qcom/msm8998-oneplus-cheeseburger.dt.yaml arch/arm64/boot/dts/qcom/msm8998-oneplus-dumpling.dt.yaml Correct them to fix the warnings. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-5-shawn.guo@linaro.org
2021-10-24arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP PHY child nodeShawn Guo1-2/+2
'#clock-cells' is a required property of QMP PHY child node, not itself. Move it to fix the dtbs_check warnings. There are only '#clock-cells' removal from SM8350 QMP PHY nodes, because child nodes already have the property. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-4-shawn.guo@linaro.org
2021-10-24arm64: dts: qcom: ipq8074: Add QUP5 I2C nodeChukun Pan1-0/+15
Add node to support the QUP5 I2C controller inside of IPQ8074. It is exactly the same as QUP2 controllers. Some routers like ZTE MF269 use this bus. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211001145421.18302-1-amadeus@jmu.edu.cn
2021-09-21arm64: dts: qcom: Update BAM DMA node name per DT schemaShawn Guo1-1/+1
Follow dma-controller.yaml schema to use `dma-controller` as node name of BAM DMA devices. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210831052325.21229-1-shawn.guo@linaro.org
2021-09-21arm64: dts: qcom: ipq8074: Fix qcom,controlled-remotely propertyShawn Guo1-1/+1
Property qcom,controlled-remotely should be boolean. Fix it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210829111628.5543-3-shawn.guo@linaro.org
2021-09-21arm64: dts: qcom: ipq8074: add SPMI busRobert Marko1-0/+19
IPQ8074 uses SPMI for communication with the PMIC, so since its already supported add the DT node for it. Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210905165816.655275-1-robimarko@gmail.com
2021-09-21arm64: dts: qcom: ipq8074: remove USB tx-fifo-resize propertyRobert Marko1-2/+0
tx-fifo-resize is now added by default by the dwc3-qcom driver to the SNPS DWC3 child node. So, lets drop the tx-fifo-resize property from dwc3-qcom nodes as having it there will cause the dwc3-qcom driver to error and abort probe with: [ 1.362938] dwc3-qcom 8af8800.usb: unable to add property [ 1.368405] dwc3-qcom 8af8800.usb: failed to register DWC3 Core, err=-17 Fixes: cefdd52fa045 ("usb: dwc3: dwc3-qcom: Enable tx-fifo-resize property by default") Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210902220325.1783567-1-robimarko@gmail.com
2021-08-16Merge tag 'v5.14-rc3' into arm64-for-5.15Bjorn Andersson1-2/+2
The USB maintainer felt the strong need to push '1f958f3dff42 ("Revert "arm64: dts: qcom: Harmonize DWC USB3 DT nodes name"")' through the usb tree, so merge v5.14-rc3 to resolve the resulting merge conflicts. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: ipq8074: add PRNG nodeRobert Marko1-0/+8
PRNG insinde of IPQ8074 is already supported, so simply add the node for it. Signed-off-by: Robert Marko <robimarko@gmail.com> Link: https://lore.kernel.org/r/20210518181618.3238386-2-robimarko@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: ipq8074: add crypto nodesRobert Marko1-0/+24
IPQ8074 uses Qualcom QCE crypto engine v5.1 which is already supported. So simply add nodes for its DMA and QCE itself. Signed-off-by: Robert Marko <robimarko@gmail.com> Link: https://lore.kernel.org/r/20210518181618.3238386-1-robimarko@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: ipq8074: fix pci node reg propertyVinod Koul1-8/+8
reg property should be array of values, here it is a single array, leading to below warning: arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@10000000:reg:0: [268435456, 3869, 268439328, 168, 557056, 8192, 269484032, 4096] is too long arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@10000000:ranges: 'oneOf' conditional failed, one must be fixed: arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@10000000:ranges: 'oneOf' conditional failed, one must be fixed: [[2164260864, 0, 270532608, 270532608, 0, 1048576, 2181038080, 0, 271581184, 271581184, 0, 13631488]] is not of type 'null' [2164260864, 0, 270532608, 270532608, 0, 1048576, 2181038080, 0, 271581184, 271581184, 0, 13631488] is too long arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@20000000:reg:0: [536870912, 3869, 536874784, 168, 524288, 8192, 537919488, 4096] is too long arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@20000000:ranges: 'oneOf' conditional failed, one must be fixed: arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@20000000:ranges: 'oneOf' conditional failed, one must be fixed: [[2164260864, 0, 538968064, 538968064, 0, 1048576, 2181038080, 0, 540016640, 540016640, 0, 13631488]] is not of type 'null' [2164260864, 0, 538968064, 538968064, 0, 1048576, 2181038080, 0, 540016640, 540016640, 0, 13631488] is too long Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-17-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-07-21Revert "arm64: dts: qcom: Harmonize DWC USB3 DT nodes name"Greg Kroah-Hartman1-2/+2
This reverts commit eb9b7bfd5954f5f6ac4d57313541dd0294660aad as it breaks working userspace implementations (i.e. Android systems) The device node name here is part of configfs, so it is a user-visable api that can not be changed. Reported-by: John Stultz <john.stultz@linaro.org> Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/CALAqxLX_FNvFndEDWtGbFPjSzuAbfqxQE07diBJFZtftwEJX5A@mail.gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-07-19arm64: dts: qcom: ipq8074: Add scm on IPQ8074 SoCsGokul Sriram Palanisamy1-0/+6
Enables scm support, clock is not needed for enabling scm interface. Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Link: https://lore.kernel.org/r/1611984013-10201-9-git-send-email-gokulsri@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-06-21arm64: dts: ipq8074: Add QUP6 I2C nodeRobert Marko1-0/+15
Add node to support the QUP6 I2C controller inside of IPQ8074. It is exactly the same as QUP2 and QUP3 controllers. Some routers like Xiaomi AX9000 and Netgear RBK850 use this bus. Signed-off-by: Robert Marko <robimarko@gmail.com> Link: https://lore.kernel.org/r/20210619162751.2336974-1-robimarko@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-31arm64: dts: qcom: Harmonize DWC USB3 DT nodes nameSerge Semin1-2/+2
In accordance with the DWC USB3 bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210324204836.29668-8-Sergey.Semin@baikalelectronics.ru Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-05-31arm64: dts: qcom: ipq8074: disable USB phy by defaultRobert Marko1-0/+1
One of the QUSB USB PHY-s has been left enabled by default, this is probably just a mistake as other USB PHY-s are disabled by default. It makes no sense to have it enabled by default as not all board implement USB ports, so disable it. Reviewed-by: Kathiravan T <kathirav@codeaurora.org> Signed-off-by: Robert Marko <robimarko@gmail.com> Link: https://lore.kernel.org/r/20210526150125.1816335-1-robimarko@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10arm64: dts: ipq8074: Fix dma node nameVinod Koul1-2/+2
DMA controller binding describes the node name should be dma-controller and not dma, so fix the node name Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201027164511.476312-10-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-13arm64: dts: ipq8074: Use the A53 PMU compatibleKathiravan T1-1/+1
IPQ8074 has A53 cores, so lets use the corresponding PMU compatible. Signed-off-by: Kathiravan T <kathirav@codeaurora.org> Link: https://lore.kernel.org/r/1597642116-15902-1-git-send-email-kathirav@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-09-13arm64: dts: ipq8074: enable watchdog supportKathiravan T1-0/+8
Enable watchdog support for the IPQ8074 SoCs. Signed-off-by: Kathiravan T <kathirav@codeaurora.org> Link: https://lore.kernel.org/r/1598862428-13996-1-git-send-email-kathirav@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24arm64: dts: ipq8074: enable USB supportSivaprakash Murugesan1-0/+167
IPQ8074 has two super speed usb ports, add phy and dwc3 nodes to enable them. Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Link: https://lore.kernel.org/r/1591625479-4483-6-git-send-email-sivaprak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-21arm64: dts: ipq8074: enable sdhci nodeSivaprakash Murugesan1-0/+22
Enable mmc device found on ipq8074 devices Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Link: https://lore.kernel.org/r/1591702511-18571-1-git-send-email-sivaprak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-13arm64: dts: ipq8074: qcom: Re-arrange dts nodes based on addressSivaprakash Murugesan1-237/+237
This patch re-arranges ipq8074 device nodes based on node address followed by node names followed by node labels. Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Link: https://lore.kernel.org/r/1586572830-22727-1-git-send-email-sivaprak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24ARM64: dts: qcom: add gpio-ranges propertyChristian Lamparter1-0/+1
This patch adds the gpio-ranges property to almost all of the Qualcomm ARM platforms that utilize the pinctrl-msm framework. The gpio-ranges property is part of the gpiolib subsystem. As a result, the binding text is available in section "2.1 gpio- and pin-controller interaction" of Documentation/devicetree/bindings/gpio/gpio.txt For more information please see the patch titled: "pinctrl: msm: fix gpio-hog related boot issues" from this series. Reported-by: Sven Eckelmann <sven.eckelmann@openmesh.com> Tested-by: Sven Eckelmann <sven.eckelmann@openmesh.com> [ipq4019] Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Tested-by: Robert Marko <robert.marko@sartura.hr> [ipq4019] Cc: Luka Perkov <luka.perkov@sartura.hr> Signed-off-by: Robert Marko <robert.marko@sartura.hr> Link: https://lore.kernel.org/r/20200108125455.308969-2-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284Thomas Gleixner1-9/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 and only version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 294 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.825281744@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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