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2022-06-17arm64: dts: ti: Align gpio-key node names with dtschemaKrzysztof Kozlowski1-2/+2
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20220616005333.18491-29-krzysztof.kozlowski@linaro.org
2022-06-17arm64: dts: ti: Adjust whitespace around '='Krzysztof Kozlowski1-2/+2
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20220526204139.831895-1-krzysztof.kozlowski@linaro.org
2022-02-16arm64: dts: ti: k3-am65*: Remove #address-cells/#size-cells from flash nodesMatthias Schiffer1-6/+2
Specifying partitions directly in the flash node is deprecated, a fixed-partitions node should be used instead. Therefore, it doesn't make sense to have these properties in the flash nodes. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/20220203140240.973690-2-matthias.schiffer@ew.tq-group.com
2021-12-07arm64: dts: ti: am654-base-board/am65-iot2050-common: Disable mcan nodesAswath Govindraju1-0/+8
AM654 base board and iot platforms do not have mcan instances pinned out. Therefore, disable all the mcan instances. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Apurva Nandan <a-nandan@ti.com> Link: https://lore.kernel.org/r/20211122134159.29936-3-a-govindraju@ti.com
2021-06-14arm64: dts: ti: am65: align ti,pindir-d0-out-d1-in property with dt-shemaAswath Govindraju1-1/+1
ti,pindir-d0-out-d1-in property is expected to be of type boolean. Therefore, fix the property accordingly. Fixes: e180f76d0641 ("arm64: dts: ti: Add support for Siemens IOT2050 boards") Fixes: 5da94b50475a ("arm64: dts: ti: k3-am654: Enable main domain McSPI0") Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20210608051414.14873-2-a-govindraju@ti.com
2021-06-07arm64: dts: ti: k3-am65-main: Add ICSSG MDIO nodesRoger Quadros1-0/+12
The ICSSGs on K3 AM65x SoCs contain an MDIO controller that can be used to control external PHYs associated with the Industrial Ethernet peripherals within each ICSSG instance. The MDIO module used within the ICSSG is similar to the MDIO Controller used in TI Davinci SoCs. A bus frequency of 1 MHz is chosen for the MDIO operations. The nodes are added and enabled in the common k3-am65-main.dtsi file by default, and disabled in the existing AM65 board dts files. These nodes need pinctrl lines, and so should be enabled only on boards where they are actually wired and pinned out for ICSSG Ethernet. Any new board dts file should disable these if they are not sure. Signed-off-by: Roger Quadros <rogerq@ti.com> [s-anna@ti.com: move the disabled status to board dts files] Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20210601150032.11432-2-s-anna@ti.com
2021-06-07arm64: dts: ti: k3-am65: Add support for UHS-I modes in MMCSD1 subsystemAswath Govindraju1-0/+33
UHS-I speed modes are supported in AM65 S.R. 2.0 SoC[1]. Add support by removing the no-1-8-v tag and including the voltage regulator device tree nodes for power cycling. However, the 4 bit interface of AM65 SR 1.0 cannot be supported at 3.3 V or 1.8 V because of erratas i2025 and i2026 [2]. As the SD card is the primary boot mode for development usecases, continue to enable SD card and disable UHS-I modes in it to minimize any ageing issues happening because of erratas. k3-am6528-iot2050-basic and k3-am6548-iot2050-advanced boards use S.R. 1.0 version of AM65 SoC. Therefore, add no-1-8-v in sdhci1 device tree node of the common iot2050 device tree file. [1] - https://www.ti.com/lit/ug/spruid7e/spruid7e.pdf, section 12.3.6.1.1 [2] - https://www.ti.com/lit/er/sprz452e/sprz452e.pdf Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20210529033749.6250-1-a-govindraju@ti.com
2021-05-28arm64: dts: ti: k3-am654x/j721e/j7200-common-proc-board: Fix MCU_RGMII1_TXC directionGrygorii Strashko1-1/+1
The MCU RGMII MCU_RGMII1_TXC pin is defined as input by mistake, although this does not make any difference functionality wise it's better to update to avoid confusion. Hence fix MCU RGMII MCU_RGMII1_TXC pin pinmux definitions to be an output in K3 am654x/j721e/j7200 board files. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20210526132041.6104-1-grygorii.strashko@ti.com
2021-05-14arm64: dts: ti: k3-am654-base-board: remove ov5640Tomi Valkeinen1-31/+0
AM654 EVM boards are not shipped with OV5640 sensor module, it is a separate purchase. OV5640 module is also just one of the possible sensors or capture boards you can connect. However, for some reason, OV5640 has been added to the board dts file, making it cumbersome to use other sensors. Remove the OV5640 from the dts file so that it is easy to use other sensors via DT overlays. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Acked-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20210423083120.73476-1-tomi.valkeinen@ideasonboard.com
2021-03-11arm64: dts: ti: am654-base-board: Enable 8D-8D-8D mode on OSPIPratyush Yadav1-2/+2
Set the Tx bus width to 8 so 8D-8D-8D mode can be selected. Change the frequency to 25 MHz. This is the frequency that the flash has been successfully tested with in Octal DTR mode. The total performance should still increase since 8D-8D-8D mode should be at least twice as fast as 1S-1S-8S mode. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20210305153926.3479-3-p.yadav@ti.com
2020-11-17arm64: dts: ti: am65/j721e/j7200: Mark firmware used uart as "reserved"Nishanth Menon1-1/+1
Follow the device tree standards that states to set the status="reserved" if an device is operational, but used by a non-linux firmware in the system. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20201113211826.13087-6-nm@ti.com
2020-11-17arm64: dts: ti: k3-am654-base-board: Fix up un-necessary status set to "okay" for USBNishanth Menon1-8/+0
The default state of a device tree node is "okay". There is no specific use of explicitly adding status = "okay" in the board dts. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Acked-by: Roger Quadros <rogerq@ti.com> Cc: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20201113211826.13087-5-nm@ti.com
2020-11-17arm64: dts: ti: k3-am65*: Cleanup disabled nodes at SoC dtsi levelNishanth Menon1-0/+16
The device tree standard states that when the status property is not present under a node, the okay value is assumed. There are many reasons for doing the same, the number of strings in the device tree, default power management functionality, etc. are a few of the reasons. In general, after a few rounds of discussions [1] there are few options one could take when dealing with SoC dtsi and board dts a. SoC dtsi provide nodes as a super-set default (aka enabled) state and to prevent messy board files, when more boards are added per SoC, we optimize and disable commonly un-used nodes in board-common.dtsi b. SoC dtsi disables all hardware dependent nodes by default and board dts files enable nodes based on a need basis. c. Subjectively pick and choose which nodes we will disable by default in SoC dtsi and over the years we can optimize things and change default state depending on the need. While there are pros and cons on each of these approaches, the right thing to do will be to stick with device tree default standards and work within those established rules. So, we choose to go with option (a). Lets cleanup defaults of am654 SoC dtsi before this gets more harder to cleanup later on and new SoCs are added. The dtb generated is identical with the patch and it is just cleanup to ensure we have a clean usage model NOTE: There is a known risk of omission that new board dts developers might miss reviewing both the board schematics in addition to all the DT nodes of the SoC when setting appropriate nodes status to disable or reserved in the board dts. This can expose issues in drivers that may not anticipate an incomplete node (example: missing appropriate board properties) being in an "okay" state. These cases are considered bugs and need to be fixed in the drivers as and when identified. [1] https://lore.kernel.org/linux-arm-kernel/20201027130701.GE5639@atomide.com/ Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Cc: Jyri Sarha <jsarha@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20201113211826.13087-2-nm@ti.com
2020-11-12arm64: dts: ti: k3-am654-base-board: Reserve memory for IPC between R5F coresSuman Anna1-0/+6
Add a reserved memory node to reserve a portion of the DDR memory to be used for performing inter-processor communication between all the MCU R5F remote processors running RTOS on all the TI AM654 boards. This memory shall be exercised only if the MCU R5FSS cluster is configured for Split mode. A single 1 MB of memory at 0xa2000000 is reserved for this purpose, and this accounts for all the vrings and vring buffers between pair of these R5F remote processors. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20201029033802.15366-5-s-anna@ti.com
2020-11-12arm64: dts: ti: k3-am654-base-board: Add DDR carveout memory nodes for R5FsSuman Anna1-0/+29
The R5F processors do not have an MMU, and as such require the exact memory used by the firmwares to be set-aside. Four carveout reserved memory nodes have been added with two each (1 MB and 15 MB in size) used for each of the MCU R5F remote processor devices on all the TI K3 AM65x boards. These nodes are assigned to the respective rproc device nodes as well. The current carveout addresses and sizes are defined statically for each device. The first region will be used as the DMA pool for the rproc device, and the second region will furnish the static carveout regions for the firmware memory. Note that the R5F1 carveouts are needed only if the corresponding R5F cluster is running in Split (non-LockStep) mode. The corresponding reserved memory nodes can be disabled later on if there is no use-case defined to use the corresponding remote processor. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20201029033802.15366-4-s-anna@ti.com
2020-11-12arm64: dts: ti: k3-am654-base-board: Add mailboxes to R5FsSuman Anna1-1/+9
Add the required 'mboxes' property to both the R5F processors on all the TI K3 AM65x boards. The mailboxes and some shared memory are required for running the Remote Processor Messaging (RPMsg) stack between the host processor and each of the R5Fs. The chosen sub-mailboxes match the values used in the current firmware images. This can be changed, if needed, as per the system integration needs after making appropriate changes on the firmware side as well. Note that the R5F Core1 resources are needed and used only when the R5F cluster is configured for Split-mode. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20201029033802.15366-3-s-anna@ti.com
2020-09-07arm64: dts: ti: k3-*: Fix up node_name_chars_strict warningsNishanth Menon1-8/+8
Building with W=2 throws up a bunch of easy to fixup warnings.. node_name_chars_strict is one of them.. Knock those out. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20200903130015.21361-9-nm@ti.com
2020-09-07arm64: dts: ti: k3-am65-base-board Use generic camera for node name instead of ov5640Nishanth Menon1-1/+1
Use camera@ naming for nodes following standard conventions of device tree (section 2.2.2 Generic Names recommendation in [1]). [1] https://github.com/devicetree-org/devicetree-specification/tree/v0.3 Suggested-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20200903130015.21361-7-nm@ti.com
2020-08-16arm64: dts: k3-am65: ti-sci-inta/intr: Update to latest bindingsLokesh Vutla1-2/+2
Update the INTA and INTR dt nodes to the latest DT bindings. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Acked-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20200806074826.24607-13-lokeshvutla@ti.com
2020-07-17arm64: dts: ti: k3-*: Replace HTTP links with HTTPS onesAlexander A. Klimov1-1/+1
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-07-17arm64: dts: ti: k3-am654-base-board: Add support for SD cardFaiz Abbas1-0/+25
With silicon revision 2.0, add support for SD card on the am65x-evm. Boards with silicon revision 1.0 are susceptible to interface issues because of erratas i2025 and i2026[1] and are recommended to disable this node. [1] Am654x Silicon Revision 1.0 errata: https://www.ti.com/lit/pdf/sprz452 Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-26arm64: dts: k3-am654-base-board: add mcu cpsw nuss pinmux and phy defsGrygorii Strashko1-0/+42
AM654 EVM base board has TI DP83867 PHY connected to external CPSW NUSS Port 1 in rgmii-rxid mode. Hence, add pinmux and Ethernet PHY configuration for TI am654 SoC Gigabit Ethernet two ports Switch subsystem (CPSW NUSS). Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Tested-by: Murali Karicheri <m-karicheri2@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-24arm64: dts: ti: k3-am654-base-board: Add CSI2 OV5640 cameraBenoit Parrot1-0/+31
Add support for the OV5640 CSI camera: - add the OV5640 nodes - add the CAL node linkage - enable CAL node Signed-off-by: Benoit Parrot <bparrot@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-01-17arm64: dts: k3-am654-base-board: Add IRQ line for GPIO expanderVignesh Raghavendra1-0/+13
Add IRQ line for IO expander present on wkup_i2c bus on AM654 EVM Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-01-17arm64: dts: ti: k3-am65: Add OSPI DT nodeVignesh Raghavendra1-0/+36
AM654 SoC has two Cadence OSPI controller instances under Flash subsystem (FSS). Add DT nodes for the same. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-10-18arm64: dts: ti: k3-am654-base-board: Add disable-wp for mmc0Faiz Abbas1-0/+1
MMC0_SDWP is not connected to the card. Indicate this by adding a disable-wp flag. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-10-18arm64: dts: ti: k3-am65-base-board: Add IPC sub-mailbox nodes for R5FsSuman Anna1-0/+58
Add the sub-mailbox nodes that are used to communicate between MPU and the two R5F remote processors present in the MCU domain to the AM654 EVM base board. These sub-mailbox nodes utilize the System Mailbox clusters 0 and 1. The interrupts associated with the Mailbox Cluster User interrupt used by the sub-mailbox nodes are also added. The GIC_SPI interrupt to be used is dynamically allocated and managed by the System Firmware through the ti-sci-intr irqchip driver. All the remaining mailbox clusters are currently not used on A53 core, and so are disabled. The sub-mailbox nodes added match the hard-coded mailbox configuration used within the TI RTOS IPC software packages. The Cortex R5F processor sub-system is assumed to be running in Split mode, so a sub-mailbox node is used by each of the R5F cores. Only the sub-mailbox node from cluster 0 is used in case of Lockstep mode. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-08-29arm64: dts: ti: k3-am654: Update the power domain cellsLokesh Vutla1-0/+1
Update the power-domain cells to 2 and mark all devices as exclusive. Main uart 0 is the debug console for based boards and it is used by different software entities like u-boot, atf, linux. So just mark main_uart0 as shared device for base board. Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-06-17arm64: dts: ti: am654-base-board: Disable SERDES and PCIeKishon Vijay Abraham I1-0/+24
AM654 base board does not have any PCIe slots. Disable all the SERDES and PCIe instances. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-06-17arm64: dts: ti: am654-base-board: Add gpio_keys nodeKeerthy1-0/+27
There are 2 push buttons: SW5 and SW6 that are basically connected to WKUP_GPIO0_24 and WKUP_GPIO0_27 respectively. Add the respective nodes and the pinctrl data to set the mode to GPIO and Input. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-02-15arm64: dts: ti: k3-am65-mcu: Add ADC nodesVignesh R1-0/+12
TI AM654 SoC has two ADC instances in the MCU domain. Add DT nodes for the same. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-02-15arm64: dts: ti: k3-am654-base-board: enable USB1Roger Quadros1-0/+28
Add pinmux for USB1 and enable it as a dual role port. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2019-02-01arm64: dts: ti: k3-am654-base-board: Add eMMC SupportFaiz Abbas1-0/+25
On the am654x-evm, sdhci0 node is connected to an eMMC. Add node and pinmux for the same. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-12-14arm64: dts: ti: k3-am654: Enable main domain McSPI0Vignesh R1-0/+27
Enable McSPI0 of main domain and add DT node for the SPI NOR flash connected to CS0. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-12-14arm64: dts: ti: k3-am654-base-board: Enable ECAP PWMVignesh R1-0/+11
Enable ECAP PWM which is used for LCD backlight. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-12-14arm64: dts: ti: k3-am654-base-board: Add I2C nodesVignesh R1-0/+70
Add DT entries for I2C instances present in AM654 SoC. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-12-14arm64: dts: ti: am654-base-board: Add pinmux for main uart0Vignesh R1-0/+16
Add pinmux for main uart0 that is serves as console on AM654 EVM Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-18arm64: dts: ti: am654: Add uart nodesNishanth Menon1-0/+5
Add uart nodes for AM654 device tree components. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-07-18arm64: dts: ti: Add support for AM654 EVM base boardNishanth Menon1-0/+36
The EValuation Module(EVM) platform for AM654 consists of a common Base board + one or more of daughter cards, which include: a) "Personality Modules", which can be specific to a profile, such as ICSSG enabled or Multi-media (including audio). b) SERDES modules, which may be 2 lane PCIe or two port PCIe + USB2 c) Camera daughter card d) various display panels Among other options. There are two basic configurations defined which include an "EVM" configuration and "IDK" (Industrial development kit) which differ in the specific combination of daughter cards that are used. To simplify support, we choose to support just the base board as the core device tree file and all daughter cards would be expected to be device tree overlays. Reviewed-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>