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2022-08-07Merge tag 'mm-nonmm-stable-2022-08-06-2' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mmLinus Torvalds1-6/+0
2022-07-29profile: setup_profiling_timer() is moslty not implementedBen Dooks1-6/+0
2022-07-19riscv: smp: Add 64bit hartid support on RV64Sunil V L1-2/+2
2022-01-09RISC-V: Use common riscv_cpuid_to_hartid_mask() for both SMP=y and SMP=nSean Christopherson1-10/+0
2021-10-26irq: riscv: perform irqentry in entry codeMark Rutland1-8/+1
2021-05-01RISC-V: Fix error code returned by riscv_hartid_to_cpuid()Anup Patel1-1/+1
2021-04-26riscv: Constify sbi_ipi_opsJisheng Zhang1-2/+2
2021-04-26riscv: Mark some global variables __ro_after_initJisheng Zhang1-2/+2
2021-03-16riscv: Enable generic clockevent broadcastGuo Ren1-0/+16
2020-08-20RISC-V: Remove CLINT related code from timer and archAnup Patel1-1/+0
2020-08-20RISC-V: Add mechanism to provide custom IPI operationsAnup Patel1-19/+24
2020-07-30riscv: Support irq_work via self IPIsGreentime Hu1-0/+15
2020-06-09RISC-V: self-contained IPI handling routineAnup Patel1-2/+9
2020-05-04RISC-V: Export riscv_cpuid_to_hartid_mask() APIAnup Patel1-0/+2
2020-03-18riscv: fix the IPI missing issue in nommu modeGreentime Hu1-1/+1
2019-11-17riscv: provide native clint access for M-modeChristoph Hellwig1-3/+13
2019-11-05riscv: abstract out CSR names for supervisor vs machine modeChristoph Hellwig1-1/+1
2019-10-28riscv: add missing header file includesPaul Walmsley1-0/+2
2019-09-20RISC-V: Export kernel symbols for kvmAtish Patra1-0/+1
2019-09-05riscv: cleanup riscv_cpuid_to_hartid_maskChristoph Hellwig1-0/+1
2019-09-05riscv: optimize send_ipi_singleChristoph Hellwig1-1/+7
2019-09-05riscv: cleanup send_ipi_maskChristoph Hellwig1-9/+7
2019-09-05riscv: refactor the IPI codeChristoph Hellwig1-24/+31
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner1-12/+1
2019-05-16riscv: move flush_icache_{all,mm} to cacheflush.cGary Guo1-49/+0
2019-05-16RISC-V: Access CSRs using CSR numbersAnup Patel1-1/+1
2019-05-16RISC-V: Fix minor checkpatch issues.Atish Patra1-2/+2
2019-04-30RISC-V: Add RISC-V specific arch_match_cpu_phys_idAtish Patra1-0/+6
2019-03-04RISC-V: Fixmap support and MM cleanupsPalmer Dabbelt1-1/+1
2019-03-04RISC-V: Allow hartid-to-cpuid function to fail.Atish Patra1-1/+0
2019-03-04RISC-V: Move cpuid to hartid mapping to SMP.Atish Patra1-0/+9
2019-01-07riscv: don't stop itself in smp_send_stopAndreas Schwab1-7/+36
2018-10-22RISC-V: Show IPI statsAnup Patel1-7/+32
2018-10-22RISC-V: Use Linux logical CPU number instead of hartidAtish Patra1-9/+15
2018-10-22RISC-V: Add logical CPU indexing for RISC-VAtish Patra1-0/+19
2018-08-13RISC-V: simplify software interrupt / IPI codeChristoph Hellwig1-4/+2
2017-12-01RISC-V: Fixes for clean allmodconfig buildPalmer Dabbelt1-0/+7
2017-11-30RISC-V: Flush I$ when making a dirty page executableAndrew Waterman1-0/+48
2017-11-30RISC-V: Provide stub of setup_profiling_timer()Olof Johansson1-0/+7
2017-09-26RISC-V: Init and Halt CodePalmer Dabbelt1-0/+110