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path: root/drivers/gpu/drm/i915/gvt/handlers.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2016-11-17drm/i915/gvt: drop checks for early Skylake revisionsJani Nikula1-4/+2
2016-11-14drm/i915/gvt: add more MMIO regs with command access flagPing Gao1-14/+16
2016-11-14drm/i915/gvt: emulate right behavior for tlb_controlPing Gao1-0/+1
2016-11-07drm/i915/gvt: emulate vgpu engine reset control behaviorDu, Changbin1-0/+26
2016-11-07drm/i915/gvt: update misc ctl regs base on stepping infoPing Gao1-5/+6
2016-11-07drm/i915/gvt: correct the emulation in TLB control handlerPing Gao1-0/+2
2016-11-07drm/i915/gvt: add write vreg in MMIO DMA_CTRL handlerPing Gao1-1/+4
2016-10-27drm/i915/gvt: throw error basing on execlist submit resultBing Niu1-3/+6
2016-10-27drm/i915/gvt: add full vGPU reset supportPing Gao1-0/+10
2016-10-26drm/i915/gvt: correct the reset logicPing Gao1-1/+5
2016-10-26drm/i915/gvt: add vreg write for GDRST handlerPing Gao1-0/+1
2016-10-20drm/i915/gvt: properly access enabled intel_engine_csZhenyu Wang1-5/+6
2016-10-20drm/i915/gvt: clean up intel_gvt.h as interface for i915 coreZhenyu Wang1-0/+2
2016-10-18drm/i915/gvt: Fix build failure after intel_engine_cs changeZhenyu Wang1-1/+1
2016-10-14drm/i915/gvt: vGPU context switchZhi Wang1-5/+36
2016-10-14drm/i915/gvt: vGPU schedule policy frameworkZhi Wang1-2/+25
2016-10-14drm/i915/gvt: vGPU workload schedulerZhi Wang1-2/+23
2016-10-14drm/i915/gvt: vGPU workload submissionZhi Wang1-2/+36
2016-10-14drm/i915/gvt: vGPU display virtualizationZhi Wang1-114/+977
2016-10-14drm/i915/gvt: vGPU MMIO virtualizationZhi Wang1-4/+1579
2016-10-14drm/i915/gvt: Introduce a framework for tracking HW registers.Zhi Wang1-0/+247
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