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Diffstat (limited to 'fpga/usrp3/top/n3xx/n320_bist_rfnoc_image_core.vh')
| -rw-r--r-- | fpga/usrp3/top/n3xx/n320_bist_rfnoc_image_core.vh | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/fpga/usrp3/top/n3xx/n320_bist_rfnoc_image_core.vh b/fpga/usrp3/top/n3xx/n320_bist_rfnoc_image_core.vh new file mode 100644 index 000000000..8f0a101c4 --- /dev/null +++ b/fpga/usrp3/top/n3xx/n320_bist_rfnoc_image_core.vh @@ -0,0 +1,19 @@ +// +// Copyright 2023 Ettus Research, a National Instruments Brand +// +// SPDX-License-Identifier: LGPL-3.0-or-later +// +// Header: rfnoc_image_core.vh (for n320) +// +// Description: +// +// This is the header file for the RFNoC Image Core. +// +// This file was automatically generated by the RFNoC image builder tool. +// Re-running that tool will overwrite this file! +// +// Source: n320_bist_rfnoc_image_core.yml +// + +`define CHDR_WIDTH 64 +`define RFNOC_PROTOVER { 8'd1, 8'd0 } |