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| author |   Tony W Wang-oc <TonyWWang-oc@zhaoxin.com> | 2019-09-18 14:19:33 +0800 |
|---|---|---|
| committer |   Borislav Petkov <bp@suse.de> | 2019-10-01 12:33:33 +0200 |
| commit | 70f0c230031dfef3c9b3e37b2a8c18d3f7186fb2 (patch) | |
| tree | e0ccb8e71eaaa9d90dce0367209f789c4c68c233 /arch/x86/kernel/cpu/mce/intel.c | |
| parent | x86/mce: Add Zhaoxin CMCI support (diff) | |
| download | wireguard-linux-70f0c230031dfef3c9b3e37b2a8c18d3f7186fb2.tar.xz wireguard-linux-70f0c230031dfef3c9b3e37b2a8c18d3f7186fb2.zip | |
x86/mce: Add Zhaoxin LMCE support
Newer Zhaoxin CPUs support LMCE compatible with Intel. Add support for
that.
[ bp: Export functions and massage. ]
Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: CooperYan@zhaoxin.com
Cc: DavidWang@zhaoxin.com
Cc: HerryYang@zhaoxin.com
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: QiyuanWang@zhaoxin.com
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: x86-ml <x86@kernel.org>
Link: https://lkml.kernel.org/r/1568787573-1297-5-git-send-email-TonyWWang-oc@zhaoxin.com
Diffstat (limited to 'arch/x86/kernel/cpu/mce/intel.c')
| -rw-r--r-- | arch/x86/kernel/cpu/mce/intel.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/mce/intel.c b/arch/x86/kernel/cpu/mce/intel.c index fb6e990b5a77..68a1d25c971e 100644 --- a/arch/x86/kernel/cpu/mce/intel.c +++ b/arch/x86/kernel/cpu/mce/intel.c @@ -444,7 +444,7 @@ void intel_init_cmci(void) cmci_recheck(); } -static void intel_init_lmce(void) +void intel_init_lmce(void) { u64 val; @@ -457,7 +457,7 @@ static void intel_init_lmce(void) wrmsrl(MSR_IA32_MCG_EXT_CTL, val | MCG_EXT_CTL_LMCE_EN); } -static void intel_clear_lmce(void) +void intel_clear_lmce(void) { u64 val; |