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author | 2013-05-01 00:16:26 +0000 | |
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committer | 2013-05-01 00:16:26 +0000 | |
commit | 027018ef4d914bb0b556abc9782cb3f8de4ac6e4 (patch) | |
tree | cf6ba19cae6ad9a511ddb51e342674cb54405a93 /sys/arch/arm/cortex/files.cortex | |
parent | Clear the right pixels when scrolling backwards. (diff) | |
download | wireguard-openbsd-027018ef4d914bb0b556abc9782cb3f8de4ac6e4.tar.xz wireguard-openbsd-027018ef4d914bb0b556abc9782cb3f8de4ac6e4.zip |
Add a cortex bus which represents the ARM MPCore Complex.
It will attach only to ARM Cortex A9 and A15 SoCs.
The generic interrupt controller and timer will attach to this bus,
later a secondary cache controller can be added.
The base address for those controllers are figured out using
the periphbase register.
ok bmercer@
Diffstat (limited to 'sys/arch/arm/cortex/files.cortex')
-rw-r--r-- | sys/arch/arm/cortex/files.cortex | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/sys/arch/arm/cortex/files.cortex b/sys/arch/arm/cortex/files.cortex new file mode 100644 index 00000000000..bf4eca15c2c --- /dev/null +++ b/sys/arch/arm/cortex/files.cortex @@ -0,0 +1,14 @@ +# $OpenBSD: files.cortex,v 1.1 2013/05/01 00:16:26 patrick Exp $ + +# ARM core +device cortex {} +attach cortex at mainbus +file arch/arm/cortex/cortex.c cortex + +device ampintc +attach ampintc at cortex +file arch/arm/cortex/ampintc.c ampintc + +device amptimer +attach amptimer at cortex +file arch/arm/cortex/amptimer.c amptimer |