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| author |   miod <miod@openbsd.org> | 2007-12-15 19:37:41 +0000 |
|---|---|---|
| committer | miod <miod@openbsd.org> | 2007-12-15 19:37:41 +0000 |
| commit | 44abbf4788a305c97488af2af7bd65cbce11e93e (patch) | |
| tree | f775f24c7f9d86d41758acf31c114d25f9834bcf /sys/dev/isa/files.isa | |
| parent | All MVME BUG manuals concur on SR3 being the only register needing to be (diff) | |
| download | wireguard-openbsd-44abbf4788a305c97488af2af7bd65cbce11e93e.tar.xz wireguard-openbsd-44abbf4788a305c97488af2af7bd65cbce11e93e.zip | |
Unconditionnaly disable the instruction cache on 40MHz MVME197LE boards,
so that they run stably. Definitely overkill and causing a severe performance
hit (they now run about as fast as a 25MHz board with I$ enabled would), but
sometimes you can't fight silicon bugs.
Other boards (i.e. 50MHz ones) are not affected.
Diffstat (limited to 'sys/dev/isa/files.isa')
0 files changed, 0 insertions, 0 deletions