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2021-03-29Fix IA32_EPT_VPID_CAP_XO_TRANSLATIONS specificationdv1-2/+2
2021-03-11spellingjsg2-4/+4
2020-12-22stop showing amd l3 cache informationjsg1-9/+2
2020-11-13Delete unused #defines: T_USER hasn't been used since July 2018guenther1-8/+1
2020-11-12Simplify interrupt entry stubs to not push around bogus trapno+errguenther1-29/+30
2020-11-09Give sizes and types to more functions and objects.guenther1-5/+3
2020-11-02Restore abstraction of register saving into macros in frameasm.hguenther1-8/+63
2020-10-28Use "memory" on inline fence instructions to suggest to the compilerjsg1-4/+4
2020-10-27Adding IOMMU support for AMD Vi and Intel VTD (disabled)jordan1-2/+3
2020-10-21Save and restore the MXCSR register and the FPU control word such thatkettenis1-1/+2
2020-09-13add an ipi for wbinvd and a linux style wbinvd_on_all_cpus() functionjsg2-3/+15
2020-09-13add SRBDS cpuid bitsjsg1-1/+4
2020-07-08Clean up the amd64 userland timecounter implementation a bit:kettenis1-3/+2
2020-07-06Add support for timeconting in userland.pirofti1-0/+24
2020-07-03Use an LFENCE instruction everywhere where we use RDTSC when we arekettenis1-1/+10
2020-06-30Remove obsolete <machine/stdarg.h> header. Nowadays the varargvisa1-58/+0
2020-06-17pci_intr_establish_cpu() for establishing an interrupt no a specific cpu.dlg2-4/+7
2020-06-03let the random subsystem read the tsc for event "timestamps".dlg1-2/+10
2020-05-31introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.dlg1-1/+3
2020-05-13Kill biospoll/pctrpoll defines and use `seltrue' directly in cdev_*_init().mpi1-3/+1
2020-04-28Use the same inittodr()/resettodr() implementation as on arm64/armv7/sparc64kettenis1-1/+2
2020-04-15Remove unused protoype.kettenis1-2/+1
2020-04-08vmm(4): add IOCTL handler to sets the access protections of the eptpd2-7/+29
2020-04-08vmm(4): handle cr0 writes more correctly for vmxpd1-1/+3
2020-03-11Take a swing at blocking Load-Value-Injection attacks against theguenther1-9/+4
2020-02-28oops some snapshot tests fell inderaadt1-4/+9
2020-02-28syncderaadt1-9/+4
2020-02-20controler -> controllerjsg1-3/+3
2020-01-24Machines have started to appear that have the framebuffer at an address > 4GB.kettenis1-1/+5
2020-01-22Remove trailing whitespace, no code change.mlarkin1-3/+3
2019-12-23Machines with many CPUs and long feature lists fill up the dmesg(8)bluhm1-2/+2
2019-12-20Disable TSX when MSR_ARCH_CAPABILITIES sets TSX_CTRL.jsg2-4/+9
2019-12-19Convert boolean_t/TRUE/FALSE to int/1/0 for coherency with the rest ofmpi1-3/+3
2019-11-29Fix size of reserved bytes section in xsave header.mortimer1-2/+2
2019-11-29Pass the EFI memory map to the kernel.kettenis1-1/+8
2019-11-07Convert db_addr_t -> vaddr_t but leave the typedef for now.mpi1-2/+2
2019-08-26Remove rdtsc macro.pirofti1-8/+1
2019-08-09Add TSC synchronization for multiprocessor machines.pirofti2-2/+9
2019-08-07Mitigate CVE-2019-1125: block speculation past conditional jump to mis-skipguenther2-5/+21
2019-08-07Add codepatch_jmp(), like codepath_call() but inserting a jmp instead of a call.guenther1-2/+3
2019-08-04Fix a typo I noticed reviewing the smbios code cleanup diff.kmos1-2/+2
2019-08-04Cleanup the bios(4)/smbios(4) code a bit. Fix some KNF issues, reducekettenis2-132/+146
2019-07-26emove duplicate definitions of LAPIC_ID_MASK and LAPIC_ID_SHIFT.kevlo1-3/+1
2019-07-17vmm/vmd: Fix migration with pvclockpd1-1/+19
2019-07-14Delete obsolete bits in a comment: mcontext is gone and struct reg is noguenther1-3/+1
2019-06-28Write back and invalidate caches before updating CPU microcode,bluhm1-2/+2
2019-06-25Implement suspend/resume support for MSI-X interrupts. Loosely based onkettenis1-1/+8
2019-06-14Add TSC_ADJUST CPUID flag.kettenis1-1/+2
2019-05-28Remove a 15 year old XXX commentmlarkin1-2/+1
2019-05-17Oops, forgot to include a copyright year when originally addedguenther1-2/+2
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