wireguard-openbsd - WireGuard implementation for the OpenBSD kernel

	Commit message (Collapse)	Author	Age	Files	Lines
*	Drop the ignored selectors (tf_[defg]s) from the trap and interrupt frames.	guenther	2018-07-10	1	-9/+1
\| \| \| \|	ok mlarkin@ deraadt@ mpi@ kettenis@
*	Make intrframe the exact same size as trapframe: instead of pushing	guenther	2018-07-03	1	-4/+3
\| \| \| \| \| \| \| \| \| \|	the PPL on top, store it where trapframe puts the trap number. This makes interrupt handlers get called with the correct stack alignment. Also, document the use of if_err to differentiate resumed/recursed interrupts from 'real' ones. tested in snaps ok deraadt@
*	Reorder trapframe/intrframe to put %rbp next to %rip and make it	guenther	2018-04-26	1	-5/+5
\| \| \| \| \| \| \| \|	behave like a real call frame, thus vastly simplifying the ddb back trace logic. based on whinging from deraadt@ ok jasper@ mpi@ phessler@
*	Meltdown: implement user/kernel page table separation.	guenther	2018-02-21	1	-1/+15
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	On Intel CPUs which speculate past user/supervisor page permission checks, use a separate page table for userspace with only the minimum of kernel code and data required for the transitions to/from the kernel (still marked as supervisor-only, of course): - the IDT (RO) - three pages of kernel text in the .kutext section for interrupt, trap, and syscall trampoline code (RX) - one page of kernel data in the .kudata section for TLB flush IPIs (RW) - the lapic page (RW, uncachable) - per CPU: one page for the TSS+GDT (RO) and one page for trampoline stacks (RW) When a syscall, trap, or interrupt takes a CPU from userspace to kernel the trampoline code switches page tables, switches stacks to the thread's real kernel stack, then copies over the necessary bits from the trampoline stack. On return to userspace the opposite occurs: recreate the iretq frame on the trampoline stack, switch stack, switch page tables, and return to userspace. mlarkin@ implemented the pmap bits and did 90% of the debugging, diagnosing issues on MP in particular, and drove the final push to completion. Many rounds of testing by naddy@, sthen@, and others Thanks to Alex Wilson from Joyent for early discussions about trampolines and their data requirements. Per-CPU page layout mostly inspired by DragonFlyBSD. ok mlarkin@ deraadt@
*	Rename and move x86 calllframe definitions in <machine/frame.h> to use	mpi	2016-02-26	1	-1/+7
\| \| \| \| \| \|	it in MI code. ok mlarkin@, visa@
*	Normalize sentinel. Use _MACHINE__H_ and _<ARCH>__H_ properly and consitently.	pirofti	2011-03-23	1	-4/+4
\| \| \| \|	Discussed and okay drahn@. Okay deraadt@.
*	First pass at removing clauses 3 and 4 from NetBSD licenses.	ray	2008-06-26	1	-8/+1
\| \| \| \| \| \| \| \| \|	Not sure what's more surprising: how long it took for NetBSD to catch up to the rest of the BSDs (including UCB), or the amount of code that NetBSD has claimed for itself without attributing to the actual authors. OK deraadt@
*	Remove the advertising clause in the UCB license which Berkeley	jsg	2005-12-13	1	-6/+2
\| \| \| \| \|	rescinded 22 July 1999. Checked by ian@, deraadt@ and millert@, arm portion checked by drahn@
*	SMP support. Big parts from NetBSD, but with some really serious debugging	art	2004-06-25	1	-2/+1
\| \| \| \| \| \| \|	done by me, niklas and others. Especially wrt. NXE support. Still needs some polishing, especially in dmesg messages, but we're now building kernel faster than ever.
*	an amd64 arch support.	mickey	2004-01-28	1	-0/+175
	hacked by art@ from netbsd sources and then later debugged by me into the shape where it can host itself. no bootloader yet as needs redoing from the recent advanced i386 sources (anyone? ;)