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* Explicitly declare the gdt storage in struct cpu_info_full instead ofguenther2018-03-291-3/+3
| | | | | | | | implicitly putting it in the padding to page-size. This eliminates a couple Coverity issues from the Meltdown work. testing daniel@ ok mlarkin@
* How about I delete _all_ the BITFIELDTYPE comments?guenther2015-09-301-12/+12
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* lint is dead: BITFIELDTYPE comments aren't usefulguenther2015-09-261-13/+13
| | | | ok miller@
* LDT is gone and not coming backguenther2015-06-281-4/+1
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* Treat primary cpu like others and put pointer to its GDT in cpu_info.ci_gdtguenther2015-05-241-2/+1
| | | | requested by and ok mlarkin@
* Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently.pirofti2011-03-231-4/+4
| | | | Discussed and okay drahn@. Okay deraadt@.
* __attribute__((packed)) -> __packed. The ioprbs.c chunk was commented out, andmiod2010-11-201-5/+5
| | | | | uncommenting it is intentional. ok deraadt@
* Switch from TSS-per-process to TSS-per-CPU, placing the TSS rightguenther2010-11-131-7/+6
| | | | | | | | | | | next to the cpu's GDT, also making the double-fault stack per-CPU, leaving it at the top of the page of the CPU's idle process. Inline pmap_activate() and pmap_deactivate() into the asm cpu_switchto routine, adding a check for the new pmap already being marked as active on the CPU. Garbage collect the hasn't-been-used-in-years GDT update IPI. Tested by many; ok mikeb@, kettenis@
* The LDT is only used by dead compat code now, so load the ldtguenther2010-10-261-29/+6
| | | | | | | | | | | | | register with the null selector (disabling use of it), stop reloading it on every context switch, and blow away the table itself, as well as the pcb and pmap bits that were used to track it. Also, delete two other unused pcb members: pcb_usersp and pcb_flags. (Deleting pcb_usersp also keeps the pcb_savefpu member aligned properly.) Finally, delete the defines for the unimplemented AMD64_{GET,SET}_LDT sysarch() calls. Tested by various with both AMD and Intel chips ok mikeb@
* Clean up segment handling: switch user-space to using code and dataguenther2010-10-141-15/+7
| | | | | | | | segments in the GDT instead of the LDT and eliminate the GDT slots that we don't actually use. tested on both amd and intel by several not really the right person, but ok: kettenis@
* - remove USER_LDT, it was never in a state where it would copile, nor willjasper2008-05-231-4/+2
| | | | | | | we support i386-compat mode on amd64. agreed by beck@, dlg@, kettenis@ ok deraadt@, tom@
* Remove the advertising clause in the UCB license which Berkeleyjsg2005-12-131-6/+2
| | | | | rescinded 22 July 1999. Checked by ian@, deraadt@ and millert@, arm portion checked by drahn@
* put int into a typederaadt2004-07-151-12/+12
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* check struct reg for evil; from netbsdmickey2004-01-291-1/+16
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* an amd64 arch support.mickey2004-01-281-0/+305
hacked by art@ from netbsd sources and then later debugged by me into the shape where it can host itself. no bootloader yet as needs redoing from the recent advanced i386 sources (anyone? ;)