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* Make sure that all CPUs end up with the same bits set in SCTLR_EL1.kettenis2021-03-271-24/+24
* Add ARMv8.5 instruction set related CPU features.kettenis2021-03-271-3/+78
* Load MSI pages through bus_dma(9). Our interrupt controllers for MSIspatrick2021-03-221-1/+2
* spellingjsg2021-03-112-4/+4
* Revise the ASID allocation sheme to avoid a hang when running out of freekettenis2021-03-081-2/+2
* Add memory attributes for stage-2 pagetables.patrick2021-02-281-1/+7
* Add some infrastructure in the PCI chipset tag for pci_probe_device_hook()patrick2021-02-251-2/+4
* remove some unused includesjsg2021-02-231-10/+0
* One CPUs that implement the VHE extension and have the E2H bit set, keepkettenis2021-02-211-1/+2
* Add support for FIQs. We need these to support agtimer(4) on Apple M1 SoCskettenis2021-02-173-18/+17
* Introduce BUS_SPACE_MAP_POSTED such that we can distinguish betweenkettenis2021-02-163-13/+14
* While it should be possible to use "normal uncachable" mappings forkettenis2021-02-151-1/+2
* last argument to pmap_fault_fixup() is unused, delete itderaadt2020-10-211-2/+2
* Add code to print CPU features.kettenis2020-10-181-6/+51
* Enable PAN (Privileged Access Never) on CPUs that support it. This meanskettenis2020-08-171-1/+3
* Remove "for all XXX platforms" from comment. Fixes the issue pointed outkettenis2020-08-141-2/+2
* Re-work intr_barrier(9) on arm64 to remove layer violation. So far wepatrick2020-07-171-2/+2
* Store struct cpu_info * in arm64's interrupt wrap. intr_barrier() canpatrick2020-07-161-1/+2
* To be able to have intr_barrier() on arm64, we need to be able topatrick2020-07-161-1/+6
* Userland timecounter implementation for arm64.kettenis2020-07-151-2/+2
* Implement pci_intr_establish_cpu() on arm64 and armv7. The function pointerpatrick2020-07-141-3/+8
* Extend the interrupt API on arm64 and armv7 to be able to pass aroundpatrick2020-07-142-7/+19
* Add support for timeconting in userland.pirofti2020-07-061-0/+23
* Remove obsolete <machine/stdarg.h> header. Nowadays the varargvisa2020-06-301-56/+0
* Implement cpu_rnd_messybits() as a read of the virtual counter xorednaddy2020-06-051-2/+11
* Allow userland access to the virtual counter.kettenis2020-06-051-1/+4
* introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.dlg2020-05-311-1/+3
* Fix typo in comment.kettenis2020-05-171-2/+2
* Add machdep.compatible.kettenis2020-05-171-4/+8
* Fix some of the more esoteric bus_space functions. Thekettenis2020-04-131-7/+8
* controler -> controllerjsg2020-02-201-3/+3
* Convert db_addr_t -> vaddr_t but leave the typedef for now.mpi2019-11-071-3/+3
* Cache flush operations on arm64 were being incorrectly treated as writedrahn2019-10-171-4/+4
* Newer ARMv8 processors now include a new CSV2 field in their processorkettenis2019-09-011-1/+7
* Fix a typo I noticed reviewing the smbios code cleanup diff.kmos2019-08-041-2/+2
* Cleanup the bios(4)/smbios(4) code a bit. Fix some KNF issues, reducekettenis2019-08-041-111/+111
* Implement smbios support on arm64.kettenis2019-08-041-0/+278
* Register cpu(4) as a cooling device. This supports passive cooling bykettenis2019-07-021-1/+2
* Implement suspend/resume support for MSI-X interrupts. Loosely based onkettenis2019-06-251-1/+8
* Remove the unused pvh_attrs attribute from struct vm_page_md.patrick2019-06-041-4/+2
* Bump MAXCPUS to 32 so that we can use all cores on the Ampere eMAG.patrick2019-06-041-2/+2
* Map the raw bus space operations to the regular ones.patrick2019-06-031-1/+15
* Change pci_intr_handle_t into a struct and replace duplicated code thatkettenis2019-06-021-2/+16
* Bump VM_MAX_KERNEL_ADDRESS so that we have about 16G of KVA. Sincepatrick2019-06-011-2/+2
* Add MSI-X support for acpipci(4). This splits out some generic code intokettenis2019-05-311-2/+6
* Add the needed ICC_PMR_EL1 register bit defines for the previouspatrick2019-05-131-2/+6
* Remove some junk that we don't use.kettenis2019-05-041-12/+1
* change marks[] array to uint64_t, so the code can track full 64-bitderaadt2019-04-101-2/+2
* Setting and getting the rounding mode on our arm64 FPU has not workedpatrick2019-03-121-2/+3
* Sprinkle a few ifdefs for _LOCORE and _KERNEL and reorder a few linespatrick2019-02-161-21/+26
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