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path: root/sys/arch/arm64/include
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2021-03-27Make sure that all CPUs end up with the same bits set in SCTLR_EL1.kettenis1-23/+23
2021-03-27Add ARMv8.5 instruction set related CPU features.kettenis1-3/+78
2021-03-22Load MSI pages through bus_dma(9). Our interrupt controllers for MSIspatrick1-1/+2
2021-03-11spellingjsg2-4/+4
2021-03-08Revise the ASID allocation sheme to avoid a hang when running out of freekettenis1-2/+2
2021-02-28Add memory attributes for stage-2 pagetables.patrick1-1/+7
2021-02-25Add some infrastructure in the PCI chipset tag for pci_probe_device_hook()patrick1-2/+4
2021-02-23remove some unused includesjsg1-10/+0
2021-02-21One CPUs that implement the VHE extension and have the E2H bit set, keepkettenis1-1/+2
2021-02-17Add support for FIQs. We need these to support agtimer(4) on Apple M1 SoCskettenis3-18/+17
2021-02-16Introduce BUS_SPACE_MAP_POSTED such that we can distinguish betweenkettenis3-13/+14
2021-02-15While it should be possible to use "normal uncachable" mappings forkettenis1-1/+2
2020-10-21last argument to pmap_fault_fixup() is unused, delete itderaadt1-2/+2
2020-10-18Add code to print CPU features.kettenis1-6/+51
2020-08-17Enable PAN (Privileged Access Never) on CPUs that support it. This meanskettenis1-1/+3
2020-08-14Remove "for all XXX platforms" from comment. Fixes the issue pointed outkettenis1-2/+2
2020-07-17Re-work intr_barrier(9) on arm64 to remove layer violation. So far wepatrick1-2/+2
2020-07-16Store struct cpu_info * in arm64's interrupt wrap. intr_barrier() canpatrick1-1/+2
2020-07-16To be able to have intr_barrier() on arm64, we need to be able topatrick1-1/+6
2020-07-15Userland timecounter implementation for arm64.kettenis1-2/+2
2020-07-14Implement pci_intr_establish_cpu() on arm64 and armv7. The function pointerpatrick1-3/+8
2020-07-14Extend the interrupt API on arm64 and armv7 to be able to pass aroundpatrick2-7/+19
2020-07-06Add support for timeconting in userland.pirofti1-0/+23
2020-06-30Remove obsolete <machine/stdarg.h> header. Nowadays the varargvisa1-56/+0
2020-06-05Implement cpu_rnd_messybits() as a read of the virtual counter xorednaddy1-2/+11
2020-06-05Allow userland access to the virtual counter.kettenis1-1/+4
2020-05-31introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.dlg1-1/+3
2020-05-17Fix typo in comment.kettenis1-2/+2
2020-05-17Add machdep.compatible.kettenis1-4/+8
2020-04-13Fix some of the more esoteric bus_space functions. Thekettenis1-7/+8
2020-02-20controler -> controllerjsg1-3/+3
2019-11-07Convert db_addr_t -> vaddr_t but leave the typedef for now.mpi1-3/+3
2019-10-17Cache flush operations on arm64 were being incorrectly treated as writedrahn1-4/+4
2019-09-01Newer ARMv8 processors now include a new CSV2 field in their processorkettenis1-1/+7
2019-08-04Fix a typo I noticed reviewing the smbios code cleanup diff.kmos1-2/+2
2019-08-04Cleanup the bios(4)/smbios(4) code a bit. Fix some KNF issues, reducekettenis1-111/+111
2019-08-04Implement smbios support on arm64.kettenis1-0/+278
2019-07-02Register cpu(4) as a cooling device. This supports passive cooling bykettenis1-1/+2
2019-06-25Implement suspend/resume support for MSI-X interrupts. Loosely based onkettenis1-1/+8
2019-06-04Remove the unused pvh_attrs attribute from struct vm_page_md.patrick1-4/+2
2019-06-04Bump MAXCPUS to 32 so that we can use all cores on the Ampere eMAG.patrick1-2/+2
2019-06-03Map the raw bus space operations to the regular ones.patrick1-1/+15
2019-06-02Change pci_intr_handle_t into a struct and replace duplicated code thatkettenis1-2/+16
2019-06-01Bump VM_MAX_KERNEL_ADDRESS so that we have about 16G of KVA. Sincepatrick1-2/+2
2019-05-31Add MSI-X support for acpipci(4). This splits out some generic code intokettenis1-2/+6
2019-05-13Add the needed ICC_PMR_EL1 register bit defines for the previouspatrick1-2/+6
2019-05-04Remove some junk that we don't use.kettenis1-12/+1
2019-04-10change marks[] array to uint64_t, so the code can track full 64-bitderaadt1-2/+2
2019-03-12Setting and getting the rounding mode on our arm64 FPU has not workedpatrick1-2/+3
2019-02-16Sprinkle a few ifdefs for _LOCORE and _KERNEL and reorder a few linespatrick1-21/+26