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* spellingjsg2021-03-116-13/+13
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* Update clock interrupt count atomically.visa2021-03-041-2/+4
| | | | | This avoids errors that can arise when multiple cores update the variable at the same time.
* timecounting: use C99-style initialization for all timecounter structscheloha2021-02-231-9/+9
| | | | | | | | | | | | | | | | | | The timecounter struct is large and I think it may change in the future. Changing it later will be easier if we use C99-style initialization for all timecounter structs. It also makes reading the code a bit easier. For reasons I cannot explain, switching to C99-style initialization sometimes changes the hash of the resulting object file, even though the resulting struct should be the same. So there is a binary change here, but only sometimes. No behavior should change in either case. I can't compile-test this everywhere but I have been staring at the diff for days now and I'm relatively confident this will not break compilation. Fingers crossed. ok gnezdo@
* Leave out gp initialization from kernel entry on mips64visa2021-02-112-8/+2
| | | | | | | | | On OpenBSD/mips64, the kernel is compiled with -mno-abicalls. This disables gp-relative addressing and essentially makes gp a spare register in the kernel. Hence it is unnecessary to initialize gp when entering the kernel. The _gp symbol is not needed either. Suggested by miod@
* kernel, sysctl(8): remove dead variable: tickadjcheloha2021-01-131-3/+2
| | | | | | | | | | | | | | | | | | | | The global "tickadj" variable is a remnant of the old NTP adjustment code we used in the kernel before the current timecounter subsystem was imported from FreeBSD circa 2004 or 2005. Fifteen years hence it is completely vestigial and we can remove it. We probably should have removed it long ago but I guess it slipped through the cracks. FreeBSD removed it in 2002: https://cgit.freebsd.org/src/commit/?id=e1d970f1811e5e1e9c912c032acdcec6521b2a6d NetBSD and DragonflyBSD can probably remove it, too. We export tickadj via the kern.clockrate sysctl(2), so update sysctl.2 and sysctl(8) accordingly. Hypothetically this change could break someone's sysctl(8) parsing script. I don't think that's very likely. ok mvs@
* Initialize mips64 pmap pool using IPL_VM.visa2020-12-241-2/+2
| | | | | This moves the pmap closer to MP-safety. A similar change has already been made on some other architectures.
* In case of failure, call sigexit() from trapsignal instead of sensig().mpi2020-11-081-12/+8
| | | | | | | Simplify MD code and reduce the amount of recursion into the signal code which helps when dealing with locks. ok cheloha@, deraadt@
* uvm_grow() doesn't need KERNEL_LOCK anymore, and onfault never did.deraadt2020-10-221-7/+6
| | | | | minor refactorings to narrow KERNEL_LOCK just around uvm_fault() ok kettenis
* uvm_grow() now does the vm_maxsaddr check (before locking), so callers don'tderaadt2020-10-211-2/+2
| | | | | need to do it ok kettenis
* mips64 has same bug as arm64: copyout(9), copyinstr(9) andderaadt2020-10-211-2/+4
| | | | | | copyoutstr(9) should bail out properly if they are called with a length of 0. ok visa
* Use a trap instruction that unconditionally terminates the process.visa2020-10-201-2/+2
| | | | OK deraadt@
* Add handling for a trap instruction that terminates the process.visa2020-10-201-1/+6
| | | | OK deraadt@
* use access_type as the PROT_* variable for uvm_fault() consistantlyderaadt2020-10-081-13/+13
| | | | ok kettenis
* Include <sys/systm.h> directly instead of relying on hidden UVM includes.mpi2020-10-071-1/+2
| | | | The header is being pulled via uvm_extern.h -> uvm_map.h
* mi_ast() needs curcpu()->ci_want_resched rather than ci->ci_want_resched,deraadt2020-09-241-4/+3
| | | | | because refreshcreds() may sleep in pool_put(). Subtle isn't it... ok visa kettenis
* Only perform uvm_map_inentry() checks for PROC_SP for userland pagefaults.deraadt2020-09-241-8/+8
| | | | | | | | This should be sufficient for identifying pivoted ROP. Doing so for other traps is at best opportunistic for finding a straight-running ROP chain, but the added (and rare) sleeping point has proven to be dangerous. Discussed at length with kettenis and mortimer. ok mortimer kettenis mpi
* Push KERNEL_LOCK/UNLOCK() dance inside trapsignal().mpi2020-08-192-6/+2
| | | | ok kettenis@, visa@
* Do not block IPIs when acquiring the rendezvous mutex. Otherwise thevisa2020-08-101-7/+5
| | | | | | | | | | | system would deadlock when a CPU gets blocked by the mutex while another CPU is waiting for the first CPU to finish a rendezvous request. This possibly fixes some hangs on sgi. There should be no effect on loongson and octeon because their interrupt code is sloppy with masking of IPIs. While here, rename the rendezvous mutex to better reflect its use.
* Use CPU_IS_PRIMARY macro in cpuattach() on mips64.fcambus2020-07-221-2/+2
| | | | OK visa@
* Userland timecounter implementation for octeonvisa2020-07-182-1/+25
| | | | OK naddy@; no objections from kettenis@
* Use CPU_IS_PRIMARY macro on alpha and mips64.fcambus2020-07-151-2/+2
| | | | OK deraadt@, visa@
* Synchronize each core's CP0 cycle counter using the IO clock counter.visa2020-07-113-7/+8
| | | | | | | | | | | This makes the cycle counter usable as timecounter on multiprocessor machines. Idea from Linux. Tested on CN5020, CN6120, CN7130 and CN7360. Looks reasonable to kettenis@
* do not need these versions of timetc.hderaadt2020-07-081-23/+0
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* Add support for timeconting in userland.pirofti2020-07-062-2/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | This diff exposes parts of clock_gettime(2) and gettimeofday(2) to userland via libc eliberating processes from the need for a context switch everytime they want to count the passage of time. If a timecounter clock can be exposed to userland than it needs to set its tc_user member to a non-zero value. Tested with one or multiple counters per architecture. The timing data is shared through a pointer found in the new ELF auxiliary vector AUX_openbsd_timekeep containing timehands information that is frequently updated by the kernel. Timing differences between the last kernel update and the current time are adjusted in userland by the tc_get_timecount() function inside the MD usertc.c file. This permits a much more responsive environment, quite visible in browsers, office programs and gaming (apparently one is are able to fly in Minecraft now). Tested by robert@, sthen@, naddy@, kmos@, phessler@, and many others! OK from at least kettenis@, cheloha@, naddy@, sthen@
* Remove obsolete <machine/stdarg.h> header. Nowadays the varargvisa2020-06-301-247/+0
| | | | | | | | functionality is provided by <sys/stdarg.h> using compiler builtins. Tested in a ports bulk build on amd64 by naddy@ OK naddy@ mpi@
* Retire unused <mips64/dev/clockvar.h> interface.visa2020-06-303-129/+2
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* cpu_rnd_messybits() for mips64visa2020-06-051-1/+13
| | | | | | | Use CP0 Count as a basis. Also take noise from virtual memory activity by including BadVAddr. OK deraadt@ dlg@
* introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.dlg2020-05-311-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | rnd.c uses nanotime to get access to some bits that change quickly between events that it can mix into the entropy pool. it doesn't use nanotime to get a monotonically increasing set or ordered and accurate timestamps, it just wants something with bits that change. there's been discussions for years about letting rnd use a clock that's super fast to read, but not necessarily accurate, but it wasn't until recently that i figured out it wasn't interested in time at all, so things like keeping a fast clock coherent between cpu cores or correct according to ntp is unecessary. this means we can just let rnd read the cycle counters on cpus and things will be fine. cpus with cycle counters that vary in their speed and arent kept consistent between cores may even be desirable in this context. so this is the first step in converting rnd.c to reading cycle counter. it copies the nanotime backend to each arch, and they can replace it with something MD as a second step later on. djm@ suggested rnd_messybytes, but we landed on cpu_rnd_messybits. thanks to visa for his eyes. ok deraadt@ visa@ deraadt@ says he will help handle any MD fallout that occurs.
* dev/rndvar.h no longer has statistical interfaces (removed during variousderaadt2020-05-291-2/+1
| | | | | | conversion steps). it only contains kernel prototypes for 4 interfaces, all of which legitimately belong in sys/systm.h, which are already included by all enqueue_randomness() users.
* Retire <machine/varargs.h>.visa2020-05-271-50/+0
| | | | | | Nothing uses the header anymore. OK deraadt@ mpi@
* Use a distinct trap code with retguard on mips64.visa2020-05-231-1/+9
| | | | | | | | | | | | This lets the kernel detect retguard traps and send SIGABRT instead of SIGEMT. SIGEMT does not indicate correctly the nature of the error (stack overflow, violation of control flow). It can confuse the user to restart the program without further investigation. Prompted by and OK deraadt@ OK mortimer@
* Make inittodr() and resettodr() MI.kettenis2020-05-161-91/+1
| | | | | ok deraadt@, mpi@, visa@ ok cheloha@ as well (would have preferred in new file for this code)
* Use todr_gettime() in cp0_calibrate() on mips64.visa2020-05-161-11/+13
| | | | | | | This allows changing RTC drivers from <mips64/dev/clockvar.h> to <dev/clock_subr.h> API. OK kettenis@
* Initialize the timeval passed to todr_gettime() with the base time fromkettenis2020-05-111-10/+5
| | | | | | | the file system such that implementations can use it to guess the right century. ok mpi@
* Use the same inittodr()/resettodr() implementation as onkettenis2020-05-091-135/+158
| | | | | | | | amd64/arm64/armv7/hppa/i386/macppc/sparc64 and move it to the end of mips64_machdep.c. Wrap the existing tod_get and tod_set hooks into something that can be used as a todr_handle. ok visa@
* Sync existing stacktrace_save() implementationsvisa2020-04-181-4/+8
| | | | | | | | Upgrade stacktrace_save() to stacktrace_save_at() on architectures where the latter is missing. Define stacktrace_save() as an inline function in header <sys/stacktrace.h> to reduce duplication of code. OK mpi@
* Separate the stack trace saving interface from ddb. The saving does notvisa2020-01-201-3/+4
| | | | | | | | | | require the debugger on most architectures, and the separation makes the code easier to use from other subsystems. The function definitions are still conditional to DDB. However, that should not matter for now. OK deraadt@, mpi@
* Use newabi register names in disassembly.visa2020-01-021-3/+3
| | | | OK miod@
* Convert various boolean_t/TRUE/FALSE to int/1/0 in mips64 memory code.visa2019-12-203-7/+7
| | | | OK mpi@
* Convert boolean_t/TRUE/FALSE to int/1/0 in mips64 pmap.visa2019-12-201-46/+46
| | | | | | Rename variables for clarity while here. OK mpi@
* Ensure that the kernel stack is properly aligned on mips64. This fixesvisa2019-11-201-2/+2
| | | | | | | | a panic related to vararg function sppp_auth_send(). The vararg code generated by clang assumes 16-byte stack alignment. pppoe(4)-induced panic seen by many on octeon Fix from miod@
* Convert db_addr_t -> vaddr_t but leave the typedef for now.mpi2019-11-073-15/+14
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* Substitute boolean_t/TRUE/FALSE by int/1/0.mpi2019-11-073-13/+13
| | | | ok dlg@, jasper@
* Fix atomic_sub_long_nv() on mips64. The negation should usevisa2019-10-281-2/+2
| | | | 64-bit unsigned arithmetic.
* Do not stop prologue scan at branch instructions. This lets stack tracevisa2019-09-061-3/+2
| | | | | saving work with the twisted code that clang occasionally emits; stack frame setup can happen very late after blocks of conditional code.
* Stop stack trace saving if the current subroutine is u_general or u_intrvisa2019-09-061-3/+4
| | | | because the next frame is in userspace.
* If uvm_map_inentry returns false then a signal has been delivered, andderaadt2019-09-061-3/+3
| | | | | | userret() must be called on trap() exit to deliver it, rather than repeating the same cause infinitely. discovered by George Koehler ok kettenis bluhm visa
* Implement splassert() on mips64.visa2019-09-051-1/+15
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* Adjust interrupt priority levels on mips64 so that prioritiesvisa2019-09-052-6/+3
| | | | | | of soft interrupts are lower than priorities of hard interrupts. This allows the delivery of hard interrupts while soft interrupts are masked.
* cpu number is unsigned (does not really matter)deraadt2019-09-021-2/+2
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