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* spellingjsg2021-03-116-15/+15
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* Add initial bits for Check Point UTM-1 EDGE N.visa2021-03-091-1/+10
| | | | From Thaison Nguyen
* Tweak whitespace and adjust prototypes.visa2021-03-041-23/+21
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* Combine octeon_pcibusvar.h into octeon_pcibus.c to reduce scatter.visa2021-03-042-56/+9
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* we don't have to cast to caddr_t when calling m_copydata anymore.dlg2021-02-251-6/+4
| | | | | | | | | | | | | | | | the first cut of this diff was made with coccinelle using this spatch: @rule@ type caddr_t; expression m, off, len, cp; @@ -m_copydata(m, off, len, (caddr_t)cp) +m_copydata(m, off, len, cp) i had fix it's opinionated idea of formatting by hand though, so i'm not sure it was worth it. ok deraadt@ bluhm@
* Fix disestablishing of PCI interrupt handlers.visa2021-02-201-9/+2
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* Do not reprogram address filter after MII status changevisa2021-02-171-5/+1
| | | | | The address filter is not affected by link parameter changes, so its reprogramming can be skipped.
* Revise cnmac(4)'s address filter setupvisa2021-02-134-114/+47
| | | | | | | | | Set up the DMAC filter in one go instead of doing it separately for unicast and multicast DMACs. This attempts to make the code a little more readable. The setup should now run a bit faster as well because it now does fewer register accesses. Tested on CN5020, CN6120 and CN7130.
* Handle Netgear ProSecure UTM25visa2021-02-042-2/+20
| | | | | | | | | | | This makes the system recognize and configure Netgear ProSecure UTM25. Of the network ports, LAN1-4 and WAN1 are functional. WAN2 does not work for some reason. Even though WAN1 has a separate link to the SoC, the connection appears to go through the same switch that the LAN ports use. At the moment, the system relies on U-Boot to set up the switch so that the LAN and WAN segments stay separate. Initial diff and input from Thaison Nguyen, thank you!
* Abstract octeon board handling a littlevisa2021-01-304-21/+21
| | | | | | | Detect octeon board model in one place, and replace firmware-supplied board_type with an abstract model identifier in driver code. This makes it easier to manage with different products, and board flavours, that happen to use the same model information, such as board_type.
* Add kstat to ogx(4).visa2021-01-012-9/+404
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* Enable IPv4 and TCP/UDP checksum offload on transmission.visa2020-12-312-11/+53
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* Rename the macro MCLGETI to MCLGETL and removes the dead parameter ifp.jan2020-12-122-4/+4
| | | | | | OK dlg@, bluhm@ No Opinion mpi@ Not against it claudio@
* Add I2C bus scan routine for octiic(4)visa2020-09-101-1/+34
| | | | | | Unfortunately, machines tend to come with underpopulated device trees, and consequently this change is not very useful as is. The lack of good data is troublesome especially with things like I2C bus switches.
* Register octiic(4) with the I2C frameworkvisa2020-09-101-5/+12
| | | | | This generally is an exercise in futility because the phandle of the controller node tends to be missing.
* Make ogx(4)'s outbound bpf(4) tap actually workvisa2020-09-091-1/+7
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* Clean up attachment of octgmx(4) a bitvisa2020-09-081-54/+39
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* Handle AGL interfacevisa2020-09-086-19/+366
| | | | This makes certain machines' management network port usable.
* Add kstat to cnmac(4)visa2020-09-047-90/+305
| | | | | | | | | | This makes various receive and transmit event counters readable. This additionally replaces the old, and somewhat unusual, way of updating error counters in ifp. Most of the hardware counters are 32 bits wide. Hence the code polls them periodically and adds the values to 64-bit software counters. The hardware counters are cleared when read.
* vfs_shutdown() is neccessary to ensure buffer cache drain before reexec()deraadt2020-09-021-1/+4
| | | | ok kettenis visa
* Make fdt root node's model property readable through sysctl hw.productvisa2020-08-281-2/+19
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* Remove unused headersvisa2020-08-151-6/+1
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* Inline handling of receive checksum offloadvisa2020-08-153-34/+17
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* Change users of IFQ_SET_MAXLEN() and IFQ_IS_EMPTY() to use the "new" API.patrick2020-07-101-2/+2
| | | | ok dlg@ tobhe@
* Remove no-op cn30xxgmx_reset_board().visa2020-07-043-12/+3
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* Use <dev/clock_subr.h> in octrtc(4).visa2020-06-301-37/+58
| | | | OK pirofti@
* Remove a dead store.visa2020-06-131-2/+1
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* dev/rndvar.h no longer has statistical interfaces (removed during variousderaadt2020-05-291-3/+1
| | | | | | conversion steps). it only contains kernel prototypes for 4 interfaces, all of which legitimately belong in sys/systm.h, which are already included by all enqueue_randomness() users.
* Rework kernel loading with octboot(4)visa2020-05-261-39/+12
| | | | | | | | Load the kernel image from the filesystem upfront in rdboot and pass the loaded image to octboot(4)'s kexec call in a memory buffer. As a result, octboot(4) does not rely on a mounted filesystem. OK deraadt@
* Update my email address.pirofti2020-04-061-2/+2
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* Add ogx(4), a driver for the OCTEON III network processor.visa2019-11-044-0/+2694
| | | | | | | | | | | This network driver covers higher-end models of the OCTEON III family. They have a modified design whose interface is not compatible with the lower-end models or earlier chip generations. The code is still a work in progress. However, it is capable enough to make the SGMII port functional on the CN7360. No objection from deraadt@
* octmmc(4): msleep(9) -> msleep_nsec(9); ok visa@ kn@cheloha2019-10-071-4/+4
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* Configure USB port power control if the power GPIO is defined in fdt.visa2019-09-291-5/+31
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* Add option to configure GPIO output select.visa2019-09-291-4/+21
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* rename the 'cn30xx' drivers to just 'oct', because digits inside devicesderaadt2019-09-284-17/+17
| | | | drivers is gross. discussed with visa.
* Remove unused register dump lists.visa2019-09-221-59/+1
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* Simplify stat register access.visa2019-09-222-7/+5
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* Ignore non-host ports silently.visa2019-09-221-5/+2
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* Remove an unused function.visa2019-09-202-16/+2
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* Pass interface number as an explicit parameter to avoid decoding.visa2019-09-201-5/+5
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* Attach packet interfaces to octpip to use fdt.visa2019-09-152-31/+3
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* Add a driver for the packet input processing unit. For now, the purposevisa2019-09-151-0/+92
| | | | of this piece of code is to facilitate the use of fdt.
* Add a driver for the PCIe controller found on OCTEON II and OCTEON III.visa2019-09-072-1/+878
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* Make it clearer where message "spurious interrupt" comes from.visa2019-09-013-8/+11
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* Ensure that a posted write completes when re-enabling interruptsvisa2019-08-041-3/+7
| | | | or sending an IPI.
* Put DWC2 controller into reset mode on (pseudo-)shutdown to makevisa2019-07-281-1/+38
| | | | kernel handover safer.
* Add a bootloader for octeon.visa2019-07-171-0/+387
| | | | | | | | | | | | | | | | | | The firmware on OCTEON machines usually does not provide an interface for accessing devices, which has made it tricky to implement an OpenBSD bootloader. To solve this device access problem, this new loader has been built on top of a small kernel. The kernel provides all the necessary devices drivers, while most of the usual bootloader logic is in a userspace program in a ramdisk. The loader program is accompanied by a special device, octboot(4). The main purpose of this device is to implement a mechanism for loading and launching kernels. The mechanism has been inspired by Linux' kexec(2) system call. The bootloader will be enabled later when it is ready for general use. Discussed with deraadt@
* Add a driver for OCTEON two-wire serial interface.visa2019-04-231-0/+438
| | | | Not enabled yet because of a conflict with octrtc(4).
* Remove an unused header.visa2019-03-211-60/+0
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* Remember to detach the event counter when disestablishingvisa2019-03-172-2/+4
| | | | an interrupt handler.
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