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* spellingjsg2021-03-111-2/+2
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* Add initial bits for Check Point UTM-1 EDGE N.visa2021-03-091-1/+2
| | | | From Thaison Nguyen
* Handle Netgear ProSecure UTM25visa2021-02-041-1/+2
| | | | | | | | | | | This makes the system recognize and configure Netgear ProSecure UTM25. Of the network ports, LAN1-4 and WAN1 are functional. WAN2 does not work for some reason. Even though WAN1 has a separate link to the SoC, the connection appears to go through the same switch that the LAN ports use. At the moment, the system relies on U-Boot to set up the switch so that the LAN and WAN segments stay separate. Initial diff and input from Thaison Nguyen, thank you!
* Abstract octeon board handling a littlevisa2021-01-301-16/+21
| | | | | | | Detect octeon board model in one place, and replace firmware-supplied board_type with an abstract model identifier in driver code. This makes it easier to manage with different products, and board flavours, that happen to use the same model information, such as board_type.
* Add kstat to cnmac(4)visa2020-09-041-1/+48
| | | | | | | | | | This makes various receive and transmit event counters readable. This additionally replaces the old, and somewhat unusual, way of updating error counters in ifp. Most of the hardware counters are 32 bits wide. Hence the code polls them periodically and adds the values to 64-bit software counters. The hardware counters are cleared when read.
* Userland timecounter implementation for octeonvisa2020-07-181-2/+2
| | | | OK naddy@; no objections from kettenis@
* Synchronize each core's CP0 cycle counter using the IO clock counter.visa2020-07-111-1/+5
| | | | | | | | | | | This makes the cycle counter usable as timecounter on multiprocessor machines. Idea from Linux. Tested on CN5020, CN6120, CN7130 and CN7360. Looks reasonable to kettenis@
* Make membar_consumer() a plain compiler barrier in kernel on octeon.visa2020-07-081-1/+2
| | | | | | | | | | | The processor does not perform speculative reads and only one of its execution pipes should issue memory accesses. As a result, loads should happen in the correct order without barrier instructions. Tested on CN5020, CN6120, CN7130 and CN7360. This diff has been in use on the octeon-based mips64 bulk build cluster for several months. Also tested in snaps for a while.
* Add support for timeconting in userland.pirofti2020-07-061-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | This diff exposes parts of clock_gettime(2) and gettimeofday(2) to userland via libc eliberating processes from the need for a context switch everytime they want to count the passage of time. If a timecounter clock can be exposed to userland than it needs to set its tc_user member to a non-zero value. Tested with one or multiple counters per architecture. The timing data is shared through a pointer found in the new ELF auxiliary vector AUX_openbsd_timekeep containing timehands information that is frequently updated by the kernel. Timing differences between the last kernel update and the current time are adjusted in userland by the tc_get_timecount() function inside the MD usertc.c file. This permits a much more responsive environment, quite visible in browsers, office programs and gaming (apparently one is are able to fly in Minecraft now). Tested by robert@, sthen@, naddy@, kmos@, phessler@, and many others! OK from at least kettenis@, cheloha@, naddy@, sthen@
* Remove obsolete <machine/stdarg.h> header. Nowadays the varargvisa2020-06-301-3/+0
| | | | | | | | functionality is provided by <sys/stdarg.h> using compiler builtins. Tested in a ports bulk build on amd64 by naddy@ OK naddy@ mpi@
* TNF rescinded clauses 3 & 4 in 2008 in NetBSD.jsg2020-06-271-8/+1
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* Retire <machine/varargs.h>.visa2020-05-271-3/+0
| | | | | | Nothing uses the header anymore. OK deraadt@ mpi@
* Rework kernel loading with octboot(4)visa2020-05-261-3/+4
| | | | | | | | Load the kernel image from the filesystem upfront in rdboot and pass the loaded image to octboot(4)'s kexec call in a memory buffer. As a result, octboot(4) does not rely on a mounted filesystem. OK deraadt@
* Fix some of the more esoteric bus_space functions. Thekettenis2020-04-141-7/+8
| | | | | | | | | | bus_space_read_region_n, bus_space_write_region_n and bus_space_set_region_n functions were all broken. Same fix as arm64; Thanks to patrick@ for noting that mips64 had the same code. ok visa@
* Add option to configure GPIO output select.visa2019-09-291-1/+5
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* Add a driver for the PCIe controller found on OCTEON II and OCTEON III.visa2019-09-071-1/+7
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* Implement splassert() on mips64.visa2019-09-051-1/+17
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* Adjust interrupt priority levels on mips64 so that prioritiesvisa2019-09-051-23/+20
| | | | | | of soft interrupts are lower than priorities of hard interrupts. This allows the delivery of hard interrupts while soft interrupts are masked.
* Add a bootloader for octeon.visa2019-07-173-2/+52
| | | | | | | | | | | | | | | | | | The firmware on OCTEON machines usually does not provide an interface for accessing devices, which has made it tricky to implement an OpenBSD bootloader. To solve this device access problem, this new loader has been built on top of a small kernel. The kernel provides all the necessary devices drivers, while most of the usual bootloader logic is in a userspace program in a ramdisk. The loader program is accompanied by a special device, octboot(4). The main purpose of this device is to implement a mechanism for loading and launching kernels. The mechanism has been inspired by Linux' kexec(2) system call. The bootloader will be enabled later when it is ready for general use. Discussed with deraadt@
* Make rootdev parsing a little saner. The "rootdev=" prefix can bevisa2019-07-121-1/+3
| | | | | removed already in process_bootargs(). Pass the value as a parameter to parse_uboot_root(). Set uboot_rootdev only if parsing succeeds.
* Remove struct intrhand. It is no longer used on octeon.visa2019-03-211-21/+1
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* Let each interrupt controller driver choose how to implementvisa2019-03-171-1/+2
| | | | | | | intr_barrier(9). With this change, the barrier should finally work properly with cnmac(4) interrupts that have been assigned to secondary cores.
* Figure out the number of available CPUs using system fuse registers.visa2018-12-181-1/+4
| | | | | | | | | | This makes `ncpusfound' independent of kernel boot parameters. The kernel still needs the help of the firmware to spin up secondary CPUs, so the `coremask' or `numcores' boot parameter is still needed for multicore operation. Tested on CN5020, CN6120, CN7130 and CN7360.
* Add processor IDs for several OCTEON II and III SoCs.visa2018-12-041-1/+5
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* Remove unused spllock().visa2018-08-201-2/+1
| | | | OK deraadt@ mpi@
* Define __HAVE_ACPI on arm64 and __HAVE_FDT on arm64, armv7 and octeonpatrick2018-08-091-1/+5
| | | | | | | | so that we can include firmware-dependant code in generic drivers to be able to extract metadata information like MAC addresses and out-of-band interrupts from the ACPI/FDT tables. ok kettenis@
* Give the FDT interrupt API a more generic naming by replacing thepatrick2018-08-062-6/+5
| | | | | | arm_intr_* prefix with fdt_intr_*. ok kettenis@
* Improve indentation and variable naming.visa2018-06-181-32/+42
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* Fix build with DEBUG_PCI_CONF.visa2018-06-181-5/+5
| | | | From jj@
* Add a driver for the OCTEON cryptographic unit. It providesvisa2018-04-091-1/+14
| | | | | | | | | | | | | | | | | | | a hardware-accelerated implementation of several encryption and authentication algorithms for ipsec(4): AES-CBC AES-CTR AES-GCM AES-GMAC HMAC-MD5 HMAC-SHA1 HMAC-SHA2-256 HMAC-SHA2-384 HMAC-SHA2-512 Please note that the driver is currently disabled. OK deraadt@
* Inline hw_{get,set}curcpu() to streamline the machine code.visa2018-02-181-3/+16
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* Include <sys/mutex.h> instead of <machine/mutex.h>mpi2018-01-221-2/+2
| | | | required by upcoming MI mutex change.
* Fix the computation of `ncpusfound' on !MULTIPROCESSOR kernels so thatvisa2018-01-181-2/+5
| | | | | | the value matches with the number of cores that GENERIC.MP uses. OK deraadt@, krw@, pirofti@
* Override membar_producer() for octeon.visa2018-01-081-2/+43
| | | | OK dlg@
* Add the board ID of the Unifi Security Gateway PRO-4.visa2017-11-201-1/+2
| | | | Not tested with the hardware.
* Fix the product code of the Unifi Security Gateway.visa2017-11-201-2/+2
| | | | Prompted by Justin Hibbits
* Add the board ID for the Ubiquiti Unifi Security Gateway.visa2017-11-181-1/+2
| | | | From Justin Hibbits, thanks!
* Add a function for getting the current core's hardware identifier.visa2017-11-051-1/+14
| | | | | | For now, the kernel does enforce one-to-one mapping between logical cpuids and hardware coreids, but the reliance on that should be removed eventually.
* Assign each cnmac(4) port its own input work group, and assignvisa2017-11-022-18/+4
| | | | | the interrupt processing of each work group to one of the available CPUs. This enables some parallelism in the early stages of packet Rx.
* Add readiness to utilize LMTDMA operations.visa2017-11-011-1/+30
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* Fix the addressing of CVMSEG. The base address already points tovisa2017-11-011-3/+3
| | | | | | the correct address space for direct referencing. Previous code has worked because the address conversion has only set bits that are already on.
* Add a dummy (for now) <machine/reloc.h> for mips64 to fix build.visa2017-08-121-0/+5
| | | | OK guenther@
* Replace OCTEON_MAXCPUS with MAXCPUS to avoid redundancy.visa2017-07-311-3/+1
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* Bump VM_PHYSSEG_MAX.visa2017-07-301-2/+2
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* Bump MAXCPUS on octeon.visa2017-07-302-5/+4
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* Define MAXCPUS per mips64 port.visa2017-07-301-1/+2
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* There is no RTC on the E300 boards.visa2017-07-291-1/+2
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* Add a workaround that allows the use of sys/dev/fdt code on octeon.visa2017-07-281-1/+5
| | | | OK kettenis@
* Remove leftovers of a past softintr mechanism.visa2017-07-251-6/+1
| | | | OK mpi@, kettenis@
* Add handling for the third interrupt summary vector,visa2017-07-131-2/+4
| | | | needed by upcoming work.
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