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* Don't put an extern variable (ppc_kvm_stolen) into vmparam.h, other instancesderaadt2021-03-151-1/+2
* spellingjsg2021-03-115-12/+12
* pmap_avail_setup() is the only place physmem is calculated, delete a bunchderaadt2021-03-101-9/+2
* Add retguard to macppc kernel locore.S, ofwreal.S, setjmp.Sgkoehler2020-11-282-17/+31
* uvm_grow() no longer needs the KERNEL_LOCK, bring it back to justderaadt2020-10-271-20/+27
* Retguard asm macros for powerpc libc, ld.sogkoehler2020-10-261-1/+42
* mi_ast() should not use the old cpu, but the cpu (after potential sleepderaadt2020-09-241-2/+2
* Only perform uvm_map_inentry() checks for PROC_SP for userland pagefaults.deraadt2020-09-241-5/+6
* Include <sys/systm.h> directly instead of relying on hidden UVM includes.mpi2020-09-113-3/+6
* Push KERNEL_LOCK/UNLOCK() dance inside trapsignal().mpi2020-08-191-15/+1
* do not need this one eitherderaadt2020-07-091-23/+0
* Add support for timeconting in userland.pirofti2020-07-061-0/+23
* Remove obsolete <machine/stdarg.h> header. Nowadays the varargvisa2020-06-301-51/+0
* Fix and harmonize some of the code dealing with address offsets encoded inkettenis2020-06-061-6/+6
* Implement cpu_rnd_messybits() as a read of the cycle counter register.naddy2020-06-051-2/+10
* introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.dlg2020-05-311-1/+3
* Retire <machine/varargs.h>.visa2020-05-271-57/+0
* Decode the %{ds}(%{A}) operand of ld, std instructions.gkoehler2020-05-221-7/+20
* Use '/t' on all architectures to get a trace via TID.mpi2020-05-141-2/+2
* Sync existing stacktrace_save() implementationsvisa2020-04-181-7/+1
* Switch powerpc to MI mplock implementation.mpi2020-04-153-29/+31
* Implement stacktrace_save_at() required for upcoming WITNESS.mpi2020-04-101-1/+38
* Fix inline assembly in ppc_mftb(); using %L0 instead of %0+1 makes this workkettenis2020-03-171-2/+2
* The 'lock spun out' db_printf needs a newline. All other MP_LOCKDEBUGclaudio2020-03-051-2/+2
* db_addr_t -> vaddr_tmpi2019-11-072-12/+12
* Substitute boolean_t/TRUE/FALSE by int/1/0.mpi2019-11-072-6/+6
* delete two decades of debugging code and further simplify the mainderaadt2019-09-061-263/+189
* oops the label is actually out:deraadt2019-09-061-2/+2
* oops incorrect goto labelderaadt2019-09-061-2/+2
* If uvm_map_inentry returns false then a signal has been delivered, andderaadt2019-09-061-2/+3
* Prepare the bat for kernels greater > 8MB of code, why because clang.deraadt2019-09-051-2/+7
* some cleanup for clang; ok kettenisderaadt2019-09-031-8/+2
* Increment `db_active' before entering db_trap() like other archs do.mpi2019-07-201-1/+3
* Use "i" constrain instead of "n" constrain in inline assembly. Makes clangkettenis2019-07-111-3/+3
* I wrote the pc-page-writeable and sp-not-MAP_STACK code to be shared, andderaadt2019-07-091-2/+3
* Drop % from register name used for register variable since it makes clangkettenis2019-07-021-2/+2
* Refactor the MAP_STACK feature, and introduce another similar variation:deraadt2019-06-011-19/+4
* Use the debugger mutex for `ddb_mp_mutex'. This should prevent a racevisa2019-03-232-19/+17
* Add intr_{disable,restore}() for powerpc.visa2019-03-231-1/+13
* In pmap_page_protect(), zap the PTE before unlinking. At that point thekettenis2019-01-021-1/+8
* Include srp.h where struct cpu_info uses srp to avoid erroring out whenjsg2018-12-051-1/+2
* More "explicitely" -> "explicitly" in various comments.krw2018-10-221-2/+2
* Unify and bump some of the NMBCLUSTERS defines. Some archs had it set toclaudio2018-09-141-2/+2
* Remove unused spllock().visa2018-08-201-2/+1
* Implement MAP_STACK option for mmap(). Synchronous faults (pagefault andderaadt2018-04-121-1/+19
* Do not panic from ddb(4) when a lock requirement isn't fulfilled.mpi2018-03-201-4/+1
* #define _MAX_PAGE_SHIFT in MD _types.h as the maximum pagesize an archderaadt2018-03-051-1/+2
* Remove mutex implementations that now live in MI code.mpi2018-01-251-151/+0
* Move common mutex implementations to a MI place.mpi2018-01-252-86/+3
* Include <sys/mutex.h> rather than <machine/mutex.h>mpi2018-01-221-2/+2