| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Enter power-saving mode on POWER9 (ISA v3) |   gkoehler | 2020-12-30 | 1 | -1/+2 |
| * | Clear FSCR register. This gives us a sane default state where all facilities |   kettenis | 2020-12-22 | 1 | -1/+7 |
| * | Add support for POWER8 (and maybe earlier) CPUs. Not sure if this works on | kettenis | 2020-08-23 | 1 | -1/+10 |
| * | Add hw.cpuspeed and hw.setperf | gkoehler | 2020-07-10 | 1 | -1/+15 |
| * | Add sync(). | kettenis | 2020-06-26 | 1 | -1/+7 |
| * | Print CPU name and cache info in the same way as we do on arm64. | kettenis | 2020-06-17 | 1 | -1/+9 |
| * | Add mtdec(). | kettenis | 2020-06-09 | 1 | -1/+7 |
| * | mainbus(4) and cpu(4). | kettenis | 2020-06-07 | 1 | -1/+9 |
| * | Bootstrap a kernel pmap and enable translations. | kettenis | 2020-06-06 | 1 | -3/+94 |
| * | Add some very simple trap handling. | kettenis | 2020-05-22 | 1 | -0/+55 |
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index : wireguard-openbsd | |
| WireGuard implementation for the OpenBSD kernel | Matt Dunwoodie |
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