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path: root/sys/arch/sgi/hpc/hpc.c (follow)
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* Go back to the previous approach when managing individual HPC DMA descriptors:miod2015-09-181-22/+42
* Give up trying to map DMA descriptor in uncached memory on ECC flavours of themiod2015-09-051-40/+40
* Correctly probe for the Ethernet chip on HPC 1.5 expansion boards. Gets rid ofmiod2013-09-281-5/+9
* Handle the coprocessor 0 cause and status registers as a 64 bit value now,miod2012-09-291-2/+2
* Proide a mips_sync() macro to wrap asm("sync"), and replace gazillions ofmiod2012-09-291-3/+2
* Proper support for the so-called `fast mode' of the Indigo2 ECC memorymiod2012-05-271-5/+81
* Better probes for sq and wdsc in gio-masqueraded-as-hpc expansion boards.miod2012-05-171-11/+54
* Add ifmedia support to sq(4).miod2012-04-301-5/+4
* Pass the base address of the hpc to child devices, to let them be able tomiod2012-04-301-1/+3
* Infrastructure to allow an interrupt handler to request its interrupt to bemiod2012-04-171-5/+23
* Overhaul hpc child device attachments:miod2012-04-151-136/+153
* Provide an hpc_intr_establish() function for hpc subdevices, so they don'tmiod2012-04-151-2/+12
* Tell Indy and Challenge S apart.miod2012-04-151-4/+4
* Be more careful when reprogramming the sq(4) DMA and PIO timing parameters;miod2012-04-081-12/+46
* Add an explicit bus_space_barrier() function for revision 3 hpc, which has amiod2012-04-051-29/+28
* DMA descriptors only need to be aligned on 8-byte boundaries, and the structmiod2012-04-051-3/+1
* Default DMA-reachable address constraints to the whole address space, andmiod2012-04-031-1/+4
* Work in progress support for the SGI Indigo, Indigo 2 and Indy systemsmiod2012-03-281-0/+822