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* Simplify the CVE-2017-5715 workaround code. Marvell backported SMSCCC 1.1kettenis2018-05-231-38/+13
| | | | | | | | | support to their ATF fork and I expect other vendors that bothered to backport the early workaround to do the same. And another ATF update is needed anyway to implement the workaround for Spectre variant 4i (CVE-2018-3639). ok patrick@, mlarkin@, jsg@
* Add support for SMCCC 1.1 which provides proper support for the firmware-basedkettenis2018-05-031-21/+144
| | | | | | workaround for branch target injection attacks (CVE 2017-5715). ok patrick@, jsg@
* Get rid of the cpu_on_fn hook and call the psci(4) functions directly insteadkettenis2018-02-231-10/+10
| | | | | | like we already do in the code that flushes the BTB. ok jsg@
* Store PSCI function ids as uint32_t not int in the softc.jsg2018-01-281-5/+5
| | | | | | | | Avoids unwanted sign extension on arm64 that resulted in qemu not recognising the function ids and matches the specification. Problem reported by semarie@ ok kettenis@
* Implement support for the PSCI_VERSION call and export the function such thatkettenis2018-01-171-3/+23
| | | | | | we can use it to defend against branch target injection attacks. ok patrick@, visa@
* Use register_t instead of uint32_t in smc/hmc calls such that argumentskettenis2017-12-291-16/+38
| | | | | to SMC64 functions don't get truncated. Implement support for the CPU_ON call.
* Add support for the older generation spec of PSCI, which supportspatrick2017-02-271-7/+28
| | | | | | | | shutdown and reset only if the function id is explicitly provided in the device tree. For the newer implementations we are supposed to be using the specified function ids only. With and ok jsg@
* Move psci(4) and plrtc(4) so arm64 can use them.jsg2017-01-251-0/+102
Tested by and ok patrick@