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* ansijsg2021-03-051-1/+1
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* remove warning about amdgpu userptr ioctl being unimplementedjsg2021-02-201-1/+0
| | | | | matches radeon and i915 reported by Benjamin Baier
* correct drm work flush behaviourjsg2021-02-142-6/+10
| | | | | | | | | Don't set taskq to system_wq in INIT_WORK(). Test if taskq pointer is non-NULL before calling taskq_barrier() in flush functions. fixes a black screen on boot problem with 5.10.y drm using nano x1 bisected by jcs@ to 'drm/i915: Always flush the active worker before returning from the wait'
* Simplify sleep_setup API to two operations in preparation for splittingmpi2021-02-081-7/+5
| | | | | | | | | | | | the SCHED_LOCK(). Putting a thread on a sleep queue is reduce to the following: sleep_setup(); /* check condition or release lock */ sleep_finish(); Previous version ok cheloha@, jmatthew@, ok claudio@
* revert drm vmalloc changesjsg2021-01-133-126/+39
| | | | | | | It is suspected they were to blame for a machine with inteldrm running X (xterms and chromium) running out of resources after a few days. ok kettenis@
* Bring the emulated Linux memory allocation interfaces more in line withkettenis2021-01-083-39/+126
| | | | | | | | | what Linux does. Let vmalloc() use km_alloc(9) instead of malloc(9) and let kvmalloc() only use malloc(9) for small (less than a page) allocations and atomic allocations. This should reduce the pressure on the "interrupt-safe" map. ok jsg@
* don't oversleep when waiting on fencesjsg2020-12-311-15/+17
| | | | original diff from and ok cheloha@
* Refactor klist insertion and removalvisa2020-12-251-4/+4
| | | | | | | | | | | | Rename klist_{insert,remove}() to klist_{insert,remove}_locked(). These functions assume that the caller has locked the klist. The current state of locking remains intact because the kernel lock is still used with all klists. Add new functions klist_insert() and klist_remove() that lock the klist internally. This allows some code simplification. OK mpi@
* sync with i915_pciids.hjsg2020-12-201-2/+0
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* drm/i915: Remove dubious Valleyview PCI IDsjsg2020-12-201-3/+1
| | | | | From Alexei Podtelezhnikov f2bde2546b81b64fb58aa04888fdd82a090b3908 in mainline linux
* remove duplicate device id caused by subids in INTEL_IVB_Q_IDSjsg2020-12-201-1/+0
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* test against [VM_MIN_ADDRESS, VM_MAXUSER_ADDRESS] in access_ok()jsg2020-12-201-3/+8
| | | | ok kettenis@
* remove unused include linux no longer hasjsg2020-12-141-0/+0
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* remove unused (and wrong) disable_irq() and enable_irq() definesjsg2020-12-141-3/+0
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* set scatterlist to NULL after freejsg2020-12-131-1/+2
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* remove unused wait interfacesjsg2020-12-132-23/+3
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* use jiffies var instead of ticks when checking for timeoutjsg2020-12-102-10/+11
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* remove timespec_to_jiffies() which no longer exists in linuxjsg2020-12-101-12/+0
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* Call ttm_tt_unpopulate() instead of directly calling ttm_tt_unpopulatejsg2020-12-081-1/+1
| | | | | | function pointer in ttm_tt_swapout(). Reduces the diff to linux. ok kettenis@
* correct ttm_tt error paths if bus_dmamap_create() failsjsg2020-12-081-2/+9
| | | | | | | | Avoids a double free of gtt in amdgpu_ttm_tt_create() if the bus_dmamap_create() call in ttm_sg_tt_init() fails and ttm_tt_destroy() calls amdgpu_ttm_backend_destroy(). feedback from and ok kettenis@
* remove unused (and wrong) page_address() macrojsg2020-12-071-1/+0
| | | | this is supposed to return a va for a page not pa
* change from bus_addr_t to paddr_t for phys_addr_t and resource_size_tjsg2020-12-071-2/+2
| | | | Types stay unsigned long; we don't do 64 bit paddr_t on any 32 bit arch.
* Use DC_FP_START()/DC_FP_END() around dcn2.1 paths known to causejsg2020-11-301-0/+6
| | | | | | | | | | | SSE FP exception traps, update_bw_bounding_box() and dcn20_populate_dml_pipes_from_context(). The scope around the dcn20_fast_validate_bw() call is large to match DC_FP_START()/DC_FP_END() use in dcn20_resource.c and avoid the situation where a dcn2.0 path would have nested DC_FP_START() calls. ok kettenis@
* Add barriers in the IO helper functions just like what was done for amdgpu(4).kettenis2020-11-211-6/+22
| | | | ok patrick@, jsg@
* The conversion of the IO BAR access did not completely mirror thepatrick2020-11-191-6/+22
| | | | | | | | | | | | behaviour of Linux' implementation: arm64's bus space operations have no barriers, so while Linux' iowrite32/ioread32 explicitly contain barriers, using bus space read/write is not enough on arm64. Add read barriers after a read to make sure that all reads have completed before the following reads. Add write barriers before a write to make sure all previous writes have completed before that write. This fixes panics on the HoneyComb LX2K with amdgpu(4). ok kettenis@
* remove unused definitions which no longer exist in linuxjsg2020-11-174-8/+2
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* remove setup_timer() interface linux removed in 2017jsg2020-11-172-8/+10
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* fix time_after32() macrojsg2020-11-171-1/+1
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* adjust for reversed outb arguments linux usesjsg2020-11-171-0/+4
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* Revise the initialization of the DRM Linux emulation layer such that wekettenis2020-11-142-30/+33
| | | | | | | | only call it when the first drm(4) instance attaches. Also add a cleanup function that gets called when the last drm(4) instance detaches. This makes sure that statically initialized IDR instances always work. ok jsg@, semarie@
* idr limit should be inclusivejsg2020-11-141-3/+7
| | | | ok kettenis@
* Bring IDR function prototypes in line with modern Linux and implementkettenis2020-11-142-37/+23
| | | | | | | IDA functions in terms of IDR. Fixes issues with running out of PASIDs in amdgpu(4). ok jsg@
* whitespacekettenis2020-11-141-2/+2
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* We should only grab the drm_global_mutex lock for legacy drivers.kettenis2020-11-141-1/+3
| | | | | | Spotted thanks to debugging work by semarie@ ok jsg@, semarie@
* use RWLOCK_INITIALIZER() in DEFINE_MUTEX()jsg2020-11-122-2/+2
| | | | | | | | | | Gives rwlocks defined this way a non-NULL rwl_name. Move ttm_pool_shrink_scan() DEFINE_MUTEX use out of function scope to fix build with WITNESS after this change and expand macro to have a better name than "lock". Found by and ok semarie@
* use a single preinitialised mutex for atomic64 fallback pathjsg2020-11-092-15/+22
| | | | | | | | | | | Previously we would initialise a variable specific mutex in ATOMIC64_INIT() or atomic64_set() but the drm code in multiple places zeroes memory and later accesses it without calling these resulting in a mutex with IPL_NONE instead of IPL_HIGH. Fixes a 'locking against myself' panic reported by Anthony Richardby on macppc with PowerBook5,6 and RV350. ok kettenis@
* use 64 bit atomic builtins on i386 for atomic64jsg2020-11-091-2/+4
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* vblank seqlock is used from interrupt context so use IPL_TTYjsg2020-11-081-1/+1
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* change from rwlock(9) to mutex(9) for linux rwlocksjsg2020-11-074-12/+8
| | | | | | | | | Linux rwlocks are read/write spin locks which don't sleep. Fixes a panic claudio@ reported with a WITNESS kernel on inteldrm(4) 'panic: acquiring blockable sleep lock with spinlock or critical section held (rwlock) drmvma' Patch from kettenis@ with a small tweak from me. ok kettenis@
* Remove unused `anon' argument from uvmfault_unlockall().mpi2020-11-061-3/+3
| | | | | | | | | It won't be used when amap and anon locking will be introduced. This "fixes" passing a unrelated/uninitialized pointer in an error path in case of memory shortage. ok kettenis@
* Remove unused `anon' argument from uvmfault_unlockall().mpi2020-11-063-9/+9
| | | | | | | | | It won't be used when amap and anon locking will be introduced. This "fixes" passing a unrelated/uninitialized pointer in an error path in case of memory shortage. ok kettenis@
* move definitions which should be in rwsem.hjsg2020-11-063-6/+14
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* We need more memory barriers on powerpc.kettenis2020-10-291-7/+13
| | | | ok tobhe@
* Silence "using MMIO for ATOM IIO" error message, since that is normal onkettenis2020-10-291-0/+2
| | | | | | POWER9 machines. ok jsg@
* Switch from bus_space_read/write to linux io.h interfaces for alljsg2020-10-286-71/+30
| | | | | | pci "memory space" io. Further reduces the diff to linux. ok kettenis@
* Use the function from <linux/io.h> for all "Memory Space" IO. This reduceskettenis2020-10-285-24/+21
| | | | | | | the diffs to Linux and makes sure we use memory barriers in the same way as Linux does. ok jsg@ (who added the doorbell changes)
* Make mapping the "I/O Space" BAR optional. POWER9 systems don't supportkettenis2020-10-261-14/+7
| | | | | | | "I/O Space" on their PCIe host bridges and for most (all) Radeon variants there is an alternative method to access the relevant registers. ok jsg@
* Improve I/O functions to match Linux:kettenis2020-10-261-9/+100
| | | | | | | | | | - Reverse byte order on big-endian architectures (except on sparc64) - Add memory barriers Note that sparc64 is special as we use a little-endian mapping for PCI bus space, so we shouldn't reverse the byte order there. ok jsg@
* remove unused alpha memory barrier definesjsg2020-10-261-5/+1
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* use __membar() where possiblejsg2020-10-261-9/+9
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