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path: root/sys/dev/pci/sdhc_pci.c (follow)
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* Some Intel SD/MMC controllers do not like the voltage beingpatrick2019-11-201-1/+8
| | | | | | | | set to 0V, so add a quirk for Apollo Lake, Gemini Lake and 100 Series. Tested by and ok bmercer@ and mlarkin@ for 100 Series Tested by and diff from James Hastings for Apollo and Gemini Lake
* Implement DMA support. Bits and pieces taken from NetBSD, but we onlykettenis2016-04-301-1/+2
| | | | | | | | | | | | support ADMA2. The older SDMA mode has too many limitations to be really usable. Gives us only moderate speed improvements, bus reduces the CPU load considerably. We will reap the full benefits once we implement wider bus widths and high speed modes. There is a remining issue with simultanious use of eMMC and external SD card on (some) Intel Bay Trail hardware. Still under investigation. ok patrick@, stsp@, deraadt@
* Fix inverted condition in previous.kettenis2015-11-241-2/+2
| | | | Problem reported by Mikolaj Kucharski.
* Make this work with 64-bit memory BARs such as those found on the newkettenis2015-11-211-13/+12
| | | | | | pcengines APU. ok deraadt@
* Fix another Ricoh SD controller which needs to be put into slow mode to work.stsp2014-09-301-3/+5
| | | | reported by mlarkin@; ok mlarkin@ deraadt@
* new ricoh controllers must also be pushed into "old slow mode" at resumederaadt2014-09-261-20/+59
| | | | time. ok kettenis jsg
* Some reallocarray() use; review Jean-Philippe Ouellet, patrick keshishianderaadt2014-07-131-3/+3
| | | | ok tedu
* Attach rtsx(4) only to devices using the 'undefined' PCI class, and dostsp2013-01-041-1/+12
| | | | | | | not ever attach sdhc(4) to devices matching the rtsx(4) vendor/product ID. Fixes an issue reported by Dave Anderson where on his hardware both drivers attached to apparently the same device which then failed to work reliably. ok deraadt
* Revamp the sequences for suspend/hibernate -> resume so that the codederaadt2012-10-081-6/+1
| | | | | | | | | | paths are reflexive. It is now possible to fail part-way through a suspend sequence, and recover along the resume code path. Split DVACT_SUSPEND by adding a new DVACT_POWERDOWN method is used after hibernate (and suspend too) to finish the job. Some drivers must be converted at the same time to use this instead of shutdown hooks (the others will follow at a later time) ok kettenis mlarkin
* Switch the Ricoh RU823 SD/MMC in SD2.0 mode (upon which it changes itselfkettenis2011-12-231-8/+37
| | | | | into a Ricoh RU822 controller). Also switch the base clock to 50MHz as some SD/MMC cards don't work with the default 200MHz clock.
* Add support for the Ricoh 5U823 SD/MMC controller found on the x220.kettenis2011-07-311-3/+16
| | | | ok deraadt@, phessler@
* remove the powerhook code. All architectures now use the ca_activate treederaadt2010-09-071-3/+2
| | | | | traversal code to suspend/resume ok oga kettenis blambert
* Improve sdhc_activate, and make sdhc_powerhook a simple wrapper aroundderaadt2010-08-271-18/+3
| | | | | it for now ok kettenis
* suspend/resume to the same level as apm machines. note: that is kindderaadt2010-07-011-2/+18
| | | | | of broken since it does not detach+reattach the card (which it has to) ok mlarkin
* MALLOC/FREE -> malloc/freechl2007-10-301-3/+3
| | | | | | | These are the latest ones needed to build a kernel (on amd64) without the MALLOC/FREE definitions in src/sys/sys/malloc.h ok krw@
* Don't try disabling bus power before setting the voltage onjsg2007-09-061-1/+6
| | | | | | | | the buggy ENE controller. Tested by Alexey Suslikov <alexey.suslikov@gmail.com> who pointed out a similiar workaround in Linux. ok miod@, nit and ok kettenis@
* usually works better when you check for the right device id. tsk tsk.fgsch2006-07-191-2/+2
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* On some TI controllers, disable the SD/MMC bit on the flash media sofgsch2006-07-181-1/+34
| | | | | the SD host takes over. originally fix from ian@, different one commited. tested by ian@ and myself. uwe@ ok.
* correct the way hosts are alloc'ed. fixes crashes on controllers withfgsch2006-07-171-3/+10
| | | | multiple slots. tested by me and ian@. uwe@ ok.
* Read the "slot info" PCI configuration register to find out how manyuwe2006-06-291-4/+21
| | | | | | | | SDHC slots there are and which BAR describes the first slot (64-bit BARs are not handled for now). This was needed for TI's PCI7621 SDHC so that we don't find slots which are not really there. Idea gleaned from Linux driver; tested with TI PCI7621 by ian@
* Support for standard SD host controllers like the Ricoh 5C822, a smalluwe2006-05-281-0/+108
generic bus layer, and SCSI emulation for SD/MMC memory cards.
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