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path: root/sys/dev/pci
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2019-06-14more Intel Apollo Lake idsjsg1-1/+10
2019-06-14Only add and remove flow table entries for multicast while the interface isjmatthew1-15/+28
2019-06-14Add a barrier after arming a completion queue. If multiple cqs are usingjmatthew1-2/+3
2019-06-13the rx drops field is 8 bits (and a 24 bit flow tag), not 32 bits.dlg1-2/+3
2019-06-12Set interrupt moderation on the completion queue for around 10000jmatthew1-2/+8
2019-06-11drm: don't block fb changes for async plane updatesjsg2-10/+20
2019-06-11drm/i915: Maintain consistent documentation subsection orderingjsg2-4/+4
2019-06-11drm/i915/fbc: disable framebuffer compression on GeminiLakejsg1-0/+4
2019-06-11drm/amdgpu: remove ATPX_DGPU_REQ_POWER_FOR_DISPLAYS check when hotplug-injsg1-2/+1
2019-06-11drm/radeon: prefer lower reference dividersjsg1-2/+2
2019-06-11drm/amdgpu/psp: move psp version specific function pointers to early_initjsg1-9/+10
2019-06-11drm: add non-desktop quirks to Sensics and OSVR headsets.jsg1-0/+6
2019-06-11drm: add non-desktop quirk for Valve HMDsjsg1-0/+19
2019-06-11Use km_alloc() instead of mallocarray() when allocating ttm dma segmentsjsg1-7/+10
2019-06-11pass what pci_intr_established returns to intr_barrierdlg1-2/+2
2019-06-11if ifiq_input says there's too much pressure, tell the rxr we're livelockeddlg1-3/+4
2019-06-11bump up the ring sizes for dlg@jmatthew1-4/+4
2019-06-11records a flowid in the mbuf if the rx cqe provides an rx hash value.dlg1-1/+6
2019-06-10support hardware timestamping for received packets.dlg1-4/+121
2019-06-10drm/lease: Make sure implicit planes are leasedjsg2-0/+12
2019-06-09Let drm(4) allocate memory without constraints if the hardware supportskettenis3-17/+27
2019-06-08disambiguate memory extent conflicts for membars and rom addressesdlg1-2/+2
2019-06-07make struct mcx_cq_entry a bit closer to realitydlg1-8/+9
2019-06-07have mcx_process_rx return the number of slots it made freedlg1-8/+10
2019-06-06ConnectX-5 cards work toojmatthew1-1/+3
2019-06-06Set up the interrupt handler before creating the event queue.jmatthew1-20/+21
2019-06-05We know which flow table entries are actually in use, so we can justjmatthew1-11/+13
2019-06-05this can support 64BIT DVA for iodlg1-2/+3
2019-06-04Move a function used as a callback out of a header so there will only bejsg2-61/+63
2019-06-04use htolemXX and lemtohXX instead of htoleXX and letohXXdlg1-25/+26
2019-06-04tx and rx descriptors work fine with 64bit dvadlg1-4/+6
2019-06-04Implement mcx_media_change(). This disables the port, sets the media type tojmatthew1-65/+158
2019-06-03Implement rx filtering using the flow table. Now we have three flow groups,jmatthew1-72/+263
2019-06-03- Remove a redundant check within alc_mii_readreg_813x().kevlo1-5/+1
2019-06-01drm: Wake up next in drm_read() chain if we are forced to putback the eventjsg1-0/+1
2019-05-31drm/amd/display: Set stream->mode_changed when connectors changejsg1-2/+1
2019-05-31drm/amd/display: Fix Divide by 0 in memory calculationsjsg1-5/+15
2019-05-31drm/amd/display: fix releasing planes when exiting odmjsg1-2/+4
2019-05-31drm/amdgpu: fix old fence check in amdgpu_fence_emitjsg1-7/+17
2019-05-31remove duplicate page tablejsg2-37/+0
2019-05-30Fix definitions of PCI_MSIX_MAU32 and add a define for the MSI-X functionkettenis1-2/+3
2019-05-30Mellanox support tells me that according to an internal datasheet, legacyjmatthew1-4/+7
2019-05-30wrap some long lines, except in bits I'll probably have to rewrite soonjmatthew1-102/+189
2019-05-29Add jumbo frame support. Set the port MTU as high as we can (up to 9500)jmatthew1-26/+49
2019-05-27spelling fixes in comments and one printf; from j sissonjmc1-8/+8
2019-05-27fix virtio_pci on 32bit archssf1-3/+9
2019-05-26Support virtio 1.0 for virtio_pcisf2-64/+511
2019-05-26Rework virtio_negotiate_features()sf1-13/+28
2019-05-26virtio_pci: Move msix vector config into functionssf1-15/+25
2019-05-26virtio_pci: Split bus space handlessf1-35/+81
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