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2021-01-27regenjsg2-2/+177
2021-01-27add some more amdgpu devicesjsg1-1/+36
2021-01-27do better accounting of how many msix interrupts we want to use.dlg1-2/+8
2021-01-26intrmap attribute missing from mcx; ok dlgderaadt1-3/+3
2021-01-25raise the max number of queues/interrupts to 16, up from 1.dlg1-3/+12
2021-01-25if the rx descriptor reports the rss hash, use it for the mbuf flowid.dlg1-2/+10
2021-01-25don't lose the M_FLOWID flag if the ipv4 cksum is ok.dlg1-2/+2
2021-01-25use an intrmap when establishing interrupts for queues.dlg1-21/+44
2021-01-24match on Intel Alder Lake and Meteor Lake I219 Ethernet idsjsg3-3/+30
2021-01-24regenjsg2-2/+47
2021-01-24add Intel Alder Lake and Meteor Lake I219 Ethernet idsjsg1-1/+10
2021-01-24match on Realtek RTL8168H ids for Killer E2500V2 and E2600jsg1-1/+3
2021-01-24regenjsg2-2/+12
2021-01-24add Realtek RTL8168H ids for Killer E2500V2 and E2600jsg1-1/+3
2021-01-23match on another Realtek RTL8168 idjsg1-1/+2
2021-01-23regenjsg2-2/+7
2021-01-23add another Realtek RTL8168 idjsg1-1/+2
2021-01-20Check management capabilities before trying to attach temperature sensors,jmatthew1-1/+43
2021-01-17add another iwx devicejcs2-11/+21
2021-01-17regenjcs2-2/+7
2021-01-17add another ax201jcs1-1/+2
2021-01-17this hardware is fine with BUS_DMA_64BIT mappings.dlg1-4/+7
2021-01-16recognise Realtek ALC287jsg1-1/+4
2021-01-16regenjsg2-4/+109
2021-01-16add devices mostly from x1 nano jcs@ hasjsg1-2/+23
2021-01-13revert drm vmalloc changesjsg3-126/+39
2021-01-08Bring the emulated Linux memory allocation interfaces more in line withkettenis3-39/+126
2021-01-04the tx doorbell is next to the rx doorbell, not on top of it.dlg1-2/+2
2021-01-04use bus_dmamap_sync around updates to the doorbells.dlg1-33/+69
2021-01-01Remove useless redundant call of ttyopen().jan1-6/+1
2020-12-31don't oversleep when waiting on fencesjsg1-15/+17
2020-12-28regenkettenis2-2/+14
2020-12-28Add Synopsys vendor and their DesignWare PCIe bridge.kettenis1-1/+5
2020-12-27have mcx_process_txeof return the number of slots it processed.dlg1-7/+8
2020-12-27do a bus space barrier after arming the eq.dlg1-2/+2
2020-12-27disable timestamping a little bit harder to avoid divide by 0.dlg1-1/+5
2020-12-27shuffle filling the rx ring so the sw prod is updated before the hw.dlg1-24/+19
2020-12-26reuse the calculated vector as the argument to pci_intr_map_msix.dlg1-2/+2
2020-12-26add bus_dmamap_sync ops around the eq.dlg1-6/+27
2020-12-26add some bus_dmamap_syncs around the rq.dlg1-2/+16
2020-12-26sprinkle some bus_dmamap_syncs around the cq handling.dlg1-1/+14
2020-12-26sprinkle some bus_dmamap_syncs around the sq.dlg1-2/+17
2020-12-26better manage the lifetime of the dmamem used for various rings.dlg1-36/+65
2020-12-25expose the mcx timer as a timecounter.dlg1-1/+30
2020-12-25match on Gemini Lake I2Cjsg1-1/+9
2020-12-25Refactor klist insertion and removalvisa1-4/+4
2020-12-24regenjsg2-4/+76
2020-12-24add some NVMe devices and Intel Comet Lake host bridgesjsg1-2/+18
2020-12-24ramdisks do not contain WOLderaadt1-1/+3
2020-12-24Add Wake on LAN support to rge(4).kevlo2-3/+86
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