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path: root/sys/arch/amd64/include/intrdefs.h (follow)
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* add an ipi for wbinvd and a linux style wbinvd_on_all_cpus() functionjsg2020-09-131-2/+3
* Fix pctr(4) issues with MP and suspend:guenther2019-03-251-2/+2
* X86_IPI_NAMES's only use was #if 0'ed out; delete bothguenther2019-03-251-6/+1
* Switch from lazy FPU switching to semi-eager FPU switching: track whetherguenther2018-06-051-5/+3
* Define and use IPL_MPFLOOR in our common mutex implementation.mpi2018-01-131-1/+2
* Setup Hyper-V hypercall page and an IDT vector.mikeb2016-06-221-1/+2
* Set up an IDT vector for Xen callbacksmikeb2015-12-081-1/+2
* vmm(4) kernel codemlarkin2015-11-131-3/+6
* Remove a #define for an ipi removed last year. No functional change.mlarkin2015-02-101-2/+1
* Fixes a hibernate issue wherein we locked the kernel lock while hatchingmlarkin2014-07-091-4/+3
* Introduce a new amd64 IPI, x86_ipi_halt_realmode to park CPUS into realmlarkin2013-06-011-3/+5
* Implement a mechanism to establish interrupt handlers that don't grab thekettenis2013-05-161-4/+6
* Raise the number of interrupt sources per CPU from 32 to 64. This effectivelykettenis2011-06-161-8/+8
* Switch from TSS-per-process to TSS-per-CPU, placing the TSS rightguenther2010-11-131-6/+4
* this is amd64, not i386, and the protection was all bustedderaadt2010-05-221-4/+4
* Rename IPL_SOFTSERIAL to IPL_SOFTTY and rename the associated symbols.kettenis2008-04-281-7/+3
* Add the mp setperf mechanism to AMD64, like its i386 counterpart it allowsgwk2007-05-061-3/+5
* Rename the MICROSET IPI we inherited from NetBSD to simply NOP sinceart2007-02-011-3/+3
* remove IPL_IMP and splimp().brad2006-03-121-2/+1
* 'machine cpuinfo' and 'machine ddbcpu' in ddb for amd64andreas2004-06-251-3/+4
* an amd64 arch support.mickey2004-01-281-0/+93