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* Userland timecounter implementation for octeonvisa2020-07-181-2/+2
* Add support for timeconting in userland.pirofti2020-07-061-0/+23
* Remove obsolete <machine/stdarg.h> header. Nowadays the varargvisa2020-06-301-3/+0
* Retire <machine/varargs.h>.visa2020-05-271-3/+0
* Fix some of the more esoteric bus_space functions. Thekettenis2020-04-141-7/+8
* Implement splassert() on mips64.visa2019-09-051-1/+17
* Adjust interrupt priority levels on mips64 so that prioritiesvisa2019-09-051-24/+21
* flense more trailing whitespacephessler2019-01-221-5/+5
* remove trailing whitespace in the Laptop Package part of the license text.phessler2019-01-221-4/+4
* Remove unused spllock().visa2018-08-201-2/+1
* Save and restore retguard area during hibernate unpack. This copies themlarkin2018-06-211-2/+2
* Include <sys/mutex.h> instead of <machine/mutex.h>mpi2018-01-221-2/+2
* Add a dummy (for now) <machine/reloc.h> for mips64 to fix build.visa2017-08-121-0/+5
* Define MAXCPUS per mips64 port.visa2017-07-301-1/+2
* Define register_splx_handler() in one place.visa2017-06-111-13/+2
* Enable radeondrm(4) on loongson to get accelerated graphicsvisa2017-05-213-4/+6
* Make IPL_MPSAFE effective on loongson.visa2017-05-171-2/+2
* Add a PCI attach hook mechanism for htb(4), similar to the onevisa2017-05-101-1/+3
* add a BUS_DMA_64BIT flag to bus_dma on all our archs.dlg2017-05-081-1/+2
* Add SMP config and IPI control logic for Loongson 3A.visa2017-02-192-3/+9
* Extend struct platform with MP control functions, and add bootstrap codevisa2017-01-193-3/+31
* Add mplock.h for loongson.visa2017-01-191-0/+3
* Determine the available CPUs.visa2016-12-111-1/+5
* Fix CPU info struct.visa2016-11-221-2/+3
* Use the ErrorEPC register for curcpu().visa2016-11-181-1/+7
* Add drivers for PCI host bridge and built-in UARTs on Loongson 3A,visa2016-11-171-2/+3
* Add interrupt handling routines for Loongson 3A.visa2016-11-062-1/+26
* Move the definition of REGVAL into a common header to make it usablevisa2016-11-051-1/+7
* Initial support for MSI-X. Only supported on amd64 for now. I have diffs tokettenis2016-05-041-1/+2
* Rename mips64's trap_frame into trapframe.mpi2016-03-061-3/+3
* Some implementations of HitSyncDCache() call pmap_extract() for va->pavisa2016-01-051-1/+5
* Use #ifndef _MACHINE_DISKLABEL_H_ everywhere. Replace _ARM_DISKLABEL_H_krw2015-09-301-1/+6
* Use consistant whitespace/comments for #define'ing LABELSECTOR,krw2015-09-301-4/+4
* intr_barrier(9) for loongson, octeon and sgi.kettenis2015-09-131-1/+3
* Some bits for Loongson 3A support.miod2015-08-151-1/+22
* Remove {LOAD,COUNT}_TEXTA from libsa loadfile, it only made sense for a.outmiod2015-07-171-3/+3
* unify the mutex implementations on all the mips64 platforms.dlg2015-07-082-61/+5
* APM_USER_HIBERNATE_REQ here too.miod2015-02-071-1/+2
* Remove some unused code that we added at the 2013 Toronto hackathon butmlarkin2014-05-311-2/+1
* Provide bus_space_mmap()miod2014-05-241-1/+6
* Due the virtually indexed nature of the L1 instruction cache on most mipsmiod2014-03-311-1/+5
* Update the loongson codebase to recognize the so-called `EFI-like' interfacemiod2014-03-292-4/+160
* It's been a quarter century: we can assume volatile is present with that name.guenther2014-03-291-2/+2
* Remove dependency from wscons_machdep upon bonito. Instead of hardcoding bonitomiod2014-03-272-4/+7
* Increase VM_PHYSSEG_MAX, necessary for systems with non-contiguous memorymiod2014-03-271-2/+2
* Support BUS_DMA_NOCACHE in bus_dma(9). Memory allocations done withmiod2014-03-101-14/+15
* Add a stub for the new MD hook needed to handle ACPI Power Resources.mpi2013-11-051-1/+2
* Start working on hibernate support for Loongsonpirofti2013-06-022-0/+73
* add missing license (PD) blockjasper2013-06-012-4/+4
* Add a dummy IPL_MPSAFE definition.kettenis2013-05-171-1/+4
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