summaryrefslogtreecommitdiffstats
path: root/sys/arch/loongson/include
AgeCommit message (Expand)AuthorFilesLines
2020-07-18Userland timecounter implementation for octeonvisa1-2/+2
2020-07-06Add support for timeconting in userland.pirofti1-0/+23
2020-06-30Remove obsolete <machine/stdarg.h> header. Nowadays the varargvisa1-3/+0
2020-05-27Retire <machine/varargs.h>.visa1-3/+0
2020-04-14Fix some of the more esoteric bus_space functions. Thekettenis1-7/+8
2019-09-05Implement splassert() on mips64.visa1-1/+17
2019-09-05Adjust interrupt priority levels on mips64 so that prioritiesvisa1-24/+21
2019-01-22flense more trailing whitespacephessler1-5/+5
2019-01-22remove trailing whitespace in the Laptop Package part of the license text.phessler1-4/+4
2018-08-20Remove unused spllock().visa1-2/+1
2018-06-21Save and restore retguard area during hibernate unpack. This copies themlarkin1-2/+2
2018-01-22Include <sys/mutex.h> instead of <machine/mutex.h>mpi1-2/+2
2017-08-12Add a dummy (for now) <machine/reloc.h> for mips64 to fix build.visa1-0/+5
2017-07-30Define MAXCPUS per mips64 port.visa1-1/+2
2017-06-11Define register_splx_handler() in one place.visa1-13/+2
2017-05-21Enable radeondrm(4) on loongson to get accelerated graphicsvisa3-4/+6
2017-05-17Make IPL_MPSAFE effective on loongson.visa1-2/+2
2017-05-10Add a PCI attach hook mechanism for htb(4), similar to the onevisa1-1/+3
2017-05-08add a BUS_DMA_64BIT flag to bus_dma on all our archs.dlg1-1/+2
2017-02-19Add SMP config and IPI control logic for Loongson 3A.visa2-3/+9
2017-01-19Extend struct platform with MP control functions, and add bootstrap codevisa3-3/+31
2017-01-19Add mplock.h for loongson.visa1-0/+3
2016-12-11Determine the available CPUs.visa1-1/+5
2016-11-22Fix CPU info struct.visa1-2/+3
2016-11-18Use the ErrorEPC register for curcpu().visa1-1/+7
2016-11-17Add drivers for PCI host bridge and built-in UARTs on Loongson 3A,visa1-2/+3
2016-11-06Add interrupt handling routines for Loongson 3A.visa2-1/+26
2016-11-05Move the definition of REGVAL into a common header to make it usablevisa1-1/+7
2016-05-04Initial support for MSI-X. Only supported on amd64 for now. I have diffs tokettenis1-1/+2
2016-03-06Rename mips64's trap_frame into trapframe.mpi1-3/+3
2016-01-05Some implementations of HitSyncDCache() call pmap_extract() for va->pavisa1-1/+5
2015-09-30Use #ifndef _MACHINE_DISKLABEL_H_ everywhere. Replace _ARM_DISKLABEL_H_krw1-1/+6
2015-09-30Use consistant whitespace/comments for #define'ing LABELSECTOR,krw1-4/+4
2015-09-13intr_barrier(9) for loongson, octeon and sgi.kettenis1-1/+3
2015-08-15Some bits for Loongson 3A support.miod1-1/+22
2015-07-17Remove {LOAD,COUNT}_TEXTA from libsa loadfile, it only made sense for a.outmiod1-3/+3
2015-07-08unify the mutex implementations on all the mips64 platforms.dlg2-61/+5
2015-02-07APM_USER_HIBERNATE_REQ here too.miod1-1/+2
2014-05-31Remove some unused code that we added at the 2013 Toronto hackathon butmlarkin1-2/+1
2014-05-24Provide bus_space_mmap()miod1-1/+6
2014-03-31Due the virtually indexed nature of the L1 instruction cache on most mipsmiod1-1/+5
2014-03-29Update the loongson codebase to recognize the so-called `EFI-like' interfacemiod2-4/+160
2014-03-29It's been a quarter century: we can assume volatile is present with that name.guenther1-2/+2
2014-03-27Remove dependency from wscons_machdep upon bonito. Instead of hardcoding bonitomiod2-4/+7
2014-03-27Increase VM_PHYSSEG_MAX, necessary for systems with non-contiguous memorymiod1-2/+2
2014-03-10Support BUS_DMA_NOCACHE in bus_dma(9). Memory allocations done withmiod1-14/+15
2013-11-05Add a stub for the new MD hook needed to handle ACPI Power Resources.mpi1-1/+2
2013-06-02Start working on hibernate support for Loongsonpirofti2-0/+73
2013-06-01add missing license (PD) blockjasper2-4/+4
2013-05-17Add a dummy IPL_MPSAFE definition.kettenis1-1/+4
Copyright © 1996 – 2026 Jason A. Donenfeld. All Rights Reverse Engineered.