| Commit message (Collapse) | Author | Age | Files | Lines |
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on the E300 boards.
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ok visa@
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This makes possible to add drivers for other interrupt controllers
on the platform.
The glue layer has been derived from arm64/armv7.
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MDIO controller drivers are attached using fdt.
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drivers on octeon. Adapted from armv7.
ok kettenis@
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ports eth[0-3] on 8-port EdgeRouters. Currently, port eth0 maps to
network interface cnmac4, eth1 to cnmac5 etc.
ok dlg@, tested by martijn@
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attachments for ehci and ohci.
ok uebayasi@ jasper@ visa@ mpi@
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memory on (at least) D-Link DSR500 machines.
This follows the CFI specification with code borrowed from zrouter
(FreeBSD). The idea, once the current driver is thoroughly tested, would
be to move it to MI land.
The prerequisites to MI are width, shift and row detection and handling.
In the long run I hope to be able to also add wdc support.
For now write support is disabled.
Okay miod@, deraadt@.
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this allows us to get rid of the static list of children devices, using only
a lookup table for address hints where needed. as a bonus this removes the
'octcf0: [..] not configured' mesage on machines w/o octcf(4).
tested by pirofti@ on DSR-500 and ERL by me
ok miod@
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- transplant the clock setup code from octhci
- add a bus space tag to deal with dwc2 using little endian addressing
- bump up the rx fifo size, necessary for umass/sd to work
tested on an edgerouter lite, which can almost boot by itself now
ok uebayasi@ (various parts), miod@ (bus space bits)
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pre-existing atomics to match.
tested on sgi (octane) and octeon (erl)
ok miod@ dlg@
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Not enabled for now. It's easier for me to work on it in-tree.
Discussed with and okay miod@
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feedback/ok miod@
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Works on my DSR-500 and on the edge router as reported on the mailing lists.
Finished sometime in August/September, needs more testing/polishing.
Similar diff from William Orr on tech@.
Prodded by deraadt@, okay jasper@.
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guards while here.
ok uebayasi@
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