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2022-04-25Revert "arm64: dts: tegra: Fix boolean properties with values"Arnd Bergmann1-4/+4
This reverts commit 1a67653de0dd, which caused a boot regression. The behavior of the "drive-push-pull" in the kernel does not match what the binding document describes. Revert Rob's patch to make the DT match the kernel again, rather than the binding. Link: https://lore.kernel.org/lkml/YlVAy95eF%2F9b1nmu@orome/ Reported-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-07arm64: dts: tegra: Fix boolean properties with valuesRob Herring1-4/+4
Boolean properties in DT are present or not present and don't take a value. A property such as 'foo = <0>;' evaluated to true. IOW, the value doesn't matter. It may have been intended that 0 values are false, but there is no change in behavior with this patch. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/Yk3nShkFzNJaI3/Z@robh.at.kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-16arm64: tegra: Rename Ethernet PHY nodesThierry Reding1-1/+1
Name the Ethernet PHY device tree nodes as expected by the DT schema. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Rename power-monitor input nodesThierry Reding1-6/+6
Child nodes of the TI INA3221 power monitor device tree node should be called input@* according to the DT schema. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16arm64: tegra: Rename top-level regulatorsThierry Reding1-3/+3
Regulators defined at the top level in device tree are no longer part of a simple bus and therefore don't have a reg property. Nodes without a reg property shouldn't have a unit-address either, so drop the unit address from the node names. To ensure nodes aren't duplicated (in which case they would end up merged in the final DTB), append the name of the regulator to the node name. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-23arm64: tegra: Set fw_devlink=on for Jetson TX2Jon Hunter1-1/+1
Commit 5d25c476f252 ("Revert "arm64: tegra: Disable the ACONNECT for Jetson TX2"") re-enabled the Tegra ADMA and ACONNECT drivers to support audio on Jetson TX2. However, this revert was dependent upon commit e590474768f1 ("driver core: Set fw_devlink=on by default") and without this commit, enabling the ACONNECT is causing resume from system suspend to fail on Jetson TX2. Resume fails because the ACONNECT driver is being resumed before the BPMP driver, and the ACONNECT driver is attempting to power on a power-domain that is provided by the BPMP. Commit e590474768f1 ("driver core: Set fw_devlink=on by default") has since been temporarily reverted while some issues are being investigated. This is causing resume from system suspend on Jetson TX2 to fail again. Rather than disable the ACONNECT driver again, fix this by setting fw_devlink is set to 'on' for Jetson TX2 in the bootargs specified in device-tree. Fixes: 5d25c476f252 ("Revert arm64: tegra: Disable the ACONNECT for Jetson TX2") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17arm64: tegra: Add label properties for EEPROMsJon Hunter1-0/+1
Populate the label property for the AT24 EEPROMs on the various Jetson platforms. Note that the name 'module' is used to identify the EEPROM on the processor module board and the name 'system' is used to identify the EEPROM on the main base board (which is sometimes referred to as the carrier board). Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Sort aliases alphabeticallyThierry Reding1-3/+3
Most device tree files already do this, so update the remaining ones for consistency. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15arm64: tegra: Use standard EEPROM propertiesThierry Reding1-2/+2
The address-bits and page-size properties that are currently used are not valid properties according to the bindings. Use the address-width and pagesize properties instead. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-13arm64: tegra: Remove simple regulators busThierry Reding1-36/+24
The standard way to do this is to list out the regulators at the top- level. Adopt the standard way to fix validation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23arm64: tegra: Rename sdhci nodes to mmcThierry Reding1-5/+5
The new json-schema based validation tools require SD/MMC controller nodes to be named mmc. Rename all references to them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23arm64: tegra: Add unit-address to memory nodeThierry Reding1-1/+1
The memory node requires a unit-address. For some boards the bootloader, which is usually locked down, uses a hard-coded name for the memory node without a unit-address, so we can't fix it on those boards. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23arm64: tegra: Add missing #phy-cells property on Jetson TX2Thierry Reding1-0/+2
PHYs need to have a #phy-cells property that defines how many cells are required in their specifier. The standard Ethernet PHY doesn't require a specifier, so set its #phy-cells to 0. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-05-20arm64: tegra: Make the RTC a wakeup source on Jetson TX2Thierry Reding1-1/+2
The RTC found on the MAX77620 PMIC can be used as a wakeup source on Jetson TX2, which is useful to wake the system from suspend at a given time. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com>
2020-03-12arm64: tegra: Add EEPROM suppliesJon Hunter1-0/+1
The following warning is observed on Jetson TX1, Jetson Nano and Jetson TX2 platforms because the supply regulators are not specified for the EEPROMs. WARNING KERN at24 0-0050: 0-0050 supply vcc not found, using dummy regulator WARNING KERN at24 0-0057: 0-0057 supply vcc not found, using dummy regulator For both of these platforms the EEPROM is powered by the main 1.8V supply rail and so populate the supply for these devices to fix these warnings. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-10arm64: tegra: Allow bootloader to configure Ethernet MAC on Jetson TX2Peter Robinson1-0/+1
Add an ethernet alias so that a stable MAC address is added to the device tree for the wired ethernet interface. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-20arm64: tegra: Add INA3221 channel info for Jetson TX2Nicolin Chen1-0/+40
There are four INA3221 chips on the Jetson TX2 (p3310 + p2771). And each INA3221 chip has three input channels to monitor power. So this patch adds these 12 channels to the DT of Jetson TX2, by following the DT binding of INA3221 and official documents from https://developer.nvidia.com/embedded/downloads tegra186-p3310: https://developer.nvidia.com/embedded/dlc/jetson-tx2-series-modules-oem-product-design-guide tegra186-p2771-0000: http://developer.nvidia.com/embedded/dlc/jetson-tx1-tx2-developer-kit-carrier-board-spec-20180618 Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-19arm64: tegra: Add ID EEPROM for Jetson TX2 moduleThierry Reding1-0/+11
There is an ID EEPROM in the Jetson TX2 module that stores various bits of information to indentify the module. Add the device tree node so that operating systems can access this EEPROM. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-05-22arm64: tegra: Clarify that P3310 is the Jetson TX2Thierry Reding1-1/+1
P3310 is the internal part number for the Jetson TX2 module. Clarify that using the DT model property. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17arm64: tegra: Remove regulator hacks on Jetson TX2Thierry Reding1-23/+0
Various regulators were marked as always-on for Jetson TX2. At this point, all of the regulators are properly hooked up, so this workaround is no longer required. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17arm64: tegra: Enable XUSB on P2771Thierry Reding1-4/+15
Enable the relevant pads for XUSB support on P2771-0000 and hook up the USB supply voltage regulators to the ports. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25arm64: tegra: p3310: Use TEGRA186_ prefix for GPIO namesThierry Reding1-4/+6
The new prefix allows the GPIOs to be uniquely identified on a per-chip basis, which makes it easier to distinguish Tegra186 specific GPIOs from those of later chips such as Tegra194 which supports a very different set of GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-12-03arm64: tegra: p3310: Enable on-die RTCThierry Reding1-0/+4
The on-die RTC isn't hooked up to a backup battery, so it isn't useful to track time across reboots, but as long as power remains enabled, it keeps track of time accurately and can be used to wake the system from sleep, for example. Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-05-03arm64: tegra: Make BCM89610 PHY interrupt as active lowBhadram Varka1-1/+1
Need to configure PHY interrupt as active low for P3310 Tegra186 platform otherwise it results in spurious interrupts. This issue wasn't seen before because the generic PHY driver without interrupt support was used. Signed-off-by: Bhadram Varka <vbhadram@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-15arm64: tegra: Fix SD write-protect polarity on Jetson TX2Thierry Reding1-1/+1
The write-protect GPIO has an active high polarity. Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13arm64: tegra: Enable HDMI on Jetson TX2Thierry Reding1-1/+1
Enable the host1x and necessary children and hook up the HDMI +5V pin to enable video output on the HDMI port found on Jetson TX2. Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13arm64: tegra: Mark I2C4 as DDC on P3310Thierry Reding1-1/+1
The P3310 compute module assigns the I2C4 to be used for DDC operations. Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13arm64: tegra: Enable memory controller on P3310Thierry Reding1-0/+4
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-03-10arm64: tegra: Enable current monitors on P3310Thierry Reding1-0/+10
The P3310 processor module contains two current monitors that can be used to determine the current flow across various parts of the board design. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-10arm64: tegra: Enable SDHCI controllers on P3110Thierry Reding1-0/+25
The P3110 processor module wires one of the SDHCI controllers to an on- board eMMC and exposes another set of SD/MMC signals on the connector to support an external SD/MMC card. A third controller is connected to the SDIO pins of an M.2 KEY E connector. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-10arm64: tegra: Add initial power tree for P3310Thierry Reding1-0/+220
Enable the Maxim MAX77620 PMIC found on P3310 and add some fixed regulators to model the power tree. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-08arm64: tegra: Enable ethernet on P3310Thierry Reding1-0/+20
The P3310 processor module provides networking via the ethernet controller found on NVIDIA Tegra186 SoCs. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-08arm64: tegra: Enable I2C controllers on P3310Thierry Reding1-1/+39
The P3310 processor modules use seven I2C controllers for various peripherals. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-08arm64: tegra: Invert the PMC interrupt on P3310Thierry Reding1-0/+4
The PMC interrupt is inverted on P3310, so mark it as such in the device tree to avoid a flood of interrupts when the PMIC is enabled. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-21arm64: tegra: Enable PSCI on P3310Thierry Reding1-0/+32
The P3310 processor module comes ships with a firmware that implements PSCI 1.0. Enable and use it to bring up all CPUs. Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-21arm64: tegra: Add NVIDIA P3310 processor module supportJoseph Lo1-0/+32
The NVIDIA P3310 is a processor module used in several reference designs that features a Tegra186 SoC, 8 GiB of LPDDR4 RAM, 32 GiB eMMC and other essentials such as ethernet, WiFi and a PMIC. It is typically connected to an I/O board (such as the P2597) that provides the connecters needed to hook it up to the outside world. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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